pub struct W(_);Expand description
Register CONF0 writer
Implementations
sourceimpl W
 
impl W
sourcepub fn parity(&mut self) -> PARITY_W<'_, 0>
 
pub fn parity(&mut self) -> PARITY_W<'_, 0>
Bit 0 - This register is used to configure the parity check mode. 0: even. 1: odd.
sourcepub fn parity_en(&mut self) -> PARITY_EN_W<'_, 1>
 
pub fn parity_en(&mut self) -> PARITY_EN_W<'_, 1>
Bit 1 - Set this bit to enable UART parity check.
sourcepub fn bit_num(&mut self) -> BIT_NUM_W<'_, 2>
 
pub fn bit_num(&mut self) -> BIT_NUM_W<'_, 2>
Bits 2:3 - This register is used to set the length of data. 0: 5 bits. 1: 6 bits. 2: 7 bits. 3: 8 bits.
sourcepub fn stop_bit_num(&mut self) -> STOP_BIT_NUM_W<'_, 4>
 
pub fn stop_bit_num(&mut self) -> STOP_BIT_NUM_W<'_, 4>
Bits 4:5 - This register is used to set the length of stop bit. 1: 1 bit. 2: 1.5 bits. 3: 2 bits.
sourcepub fn sw_rts(&mut self) -> SW_RTS_W<'_, 6>
 
pub fn sw_rts(&mut self) -> SW_RTS_W<'_, 6>
Bit 6 - This register is used to configure the software RTS signal which is used in software flow control.
sourcepub fn sw_dtr(&mut self) -> SW_DTR_W<'_, 7>
 
pub fn sw_dtr(&mut self) -> SW_DTR_W<'_, 7>
Bit 7 - This register is used to configure the software DTR signal which is used in software flow control.
sourcepub fn txd_brk(&mut self) -> TXD_BRK_W<'_, 8>
 
pub fn txd_brk(&mut self) -> TXD_BRK_W<'_, 8>
Bit 8 - Set this bit to enable the transmitter to send NULL characters when the process of sending data is done.
sourcepub fn irda_dplx(&mut self) -> IRDA_DPLX_W<'_, 9>
 
pub fn irda_dplx(&mut self) -> IRDA_DPLX_W<'_, 9>
Bit 9 - Set this bit to enable IrDA loopback mode.
sourcepub fn irda_tx_en(&mut self) -> IRDA_TX_EN_W<'_, 10>
 
pub fn irda_tx_en(&mut self) -> IRDA_TX_EN_W<'_, 10>
Bit 10 - This is the start enable bit for IrDA transmitter.
sourcepub fn irda_wctl(&mut self) -> IRDA_WCTL_W<'_, 11>
 
pub fn irda_wctl(&mut self) -> IRDA_WCTL_W<'_, 11>
Bit 11 - 1: The IrDA transmitter’s 11th bit is the same as 10th bit. 0: Set IrDA transmitter’s 11th bit to 0.
sourcepub fn irda_tx_inv(&mut self) -> IRDA_TX_INV_W<'_, 12>
 
pub fn irda_tx_inv(&mut self) -> IRDA_TX_INV_W<'_, 12>
Bit 12 - Set this bit to invert the level of IrDA transmitter.
sourcepub fn irda_rx_inv(&mut self) -> IRDA_RX_INV_W<'_, 13>
 
pub fn irda_rx_inv(&mut self) -> IRDA_RX_INV_W<'_, 13>
Bit 13 - Set this bit to invert the level of IrDA receiver.
sourcepub fn loopback(&mut self) -> LOOPBACK_W<'_, 14>
 
pub fn loopback(&mut self) -> LOOPBACK_W<'_, 14>
Bit 14 - Set this bit to enable UART loopback test mode.
sourcepub fn tx_flow_en(&mut self) -> TX_FLOW_EN_W<'_, 15>
 
pub fn tx_flow_en(&mut self) -> TX_FLOW_EN_W<'_, 15>
Bit 15 - Set this bit to enable flow control function for the transmitter.
sourcepub fn rxfifo_rst(&mut self) -> RXFIFO_RST_W<'_, 17>
 
pub fn rxfifo_rst(&mut self) -> RXFIFO_RST_W<'_, 17>
Bit 17 - Set this bit to reset the UART RX FIFO.
sourcepub fn txfifo_rst(&mut self) -> TXFIFO_RST_W<'_, 18>
 
pub fn txfifo_rst(&mut self) -> TXFIFO_RST_W<'_, 18>
Bit 18 - Set this bit to reset the UART TX FIFO.
sourcepub fn rxd_inv(&mut self) -> RXD_INV_W<'_, 19>
 
pub fn rxd_inv(&mut self) -> RXD_INV_W<'_, 19>
Bit 19 - Set this bit to invert the level of UART RXD signal.
sourcepub fn cts_inv(&mut self) -> CTS_INV_W<'_, 20>
 
pub fn cts_inv(&mut self) -> CTS_INV_W<'_, 20>
Bit 20 - Set this bit to invert the level of UART CTS signal.
sourcepub fn dsr_inv(&mut self) -> DSR_INV_W<'_, 21>
 
pub fn dsr_inv(&mut self) -> DSR_INV_W<'_, 21>
Bit 21 - Set this bit to invert the level of UART DSR signal.
sourcepub fn txd_inv(&mut self) -> TXD_INV_W<'_, 22>
 
pub fn txd_inv(&mut self) -> TXD_INV_W<'_, 22>
Bit 22 - Set this bit to invert the level of UART TXD signal.
sourcepub fn rts_inv(&mut self) -> RTS_INV_W<'_, 23>
 
pub fn rts_inv(&mut self) -> RTS_INV_W<'_, 23>
Bit 23 - Set this bit to invert the level of UART RTS signal.
sourcepub fn dtr_inv(&mut self) -> DTR_INV_W<'_, 24>
 
pub fn dtr_inv(&mut self) -> DTR_INV_W<'_, 24>
Bit 24 - Set this bit to invert the level of UART DTR signal.
sourcepub fn clk_en(&mut self) -> CLK_EN_W<'_, 25>
 
pub fn clk_en(&mut self) -> CLK_EN_W<'_, 25>
Bit 25 - 1: Force clock on for registers. 0: Support clock only when application writes registers.
sourcepub fn err_wr_mask(&mut self) -> ERR_WR_MASK_W<'_, 26>
 
pub fn err_wr_mask(&mut self) -> ERR_WR_MASK_W<'_, 26>
Bit 26 - 1: The receiver stops storing data into FIFO when data is wrong. 0: The receiver stores the data even if the received data is wrong.
sourcepub fn tick_ref_always_on(&mut self) -> TICK_REF_ALWAYS_ON_W<'_, 27>
 
pub fn tick_ref_always_on(&mut self) -> TICK_REF_ALWAYS_ON_W<'_, 27>
Bit 27 - This register is used to select the clock. 1: APB_CLK. 0: REF_TICK.
sourcepub fn mem_clk_en(&mut self) -> MEM_CLK_EN_W<'_, 28>
 
pub fn mem_clk_en(&mut self) -> MEM_CLK_EN_W<'_, 28>
Bit 28 - The signal to enable UART RAM clock gating. 1: UART RAM powers on, the data of which can be read and written. 0: UART RAM powers down.
Methods from Deref<Target = W<CONF0_SPEC>>
Trait Implementations
sourceimpl From<W<CONF0_SPEC>> for W
 
impl From<W<CONF0_SPEC>> for W
sourcefn from(writer: W<CONF0_SPEC>) -> Self
 
fn from(writer: W<CONF0_SPEC>) -> Self
Converts to this type from the input type.
Auto Trait Implementations
Blanket Implementations
sourceimpl<T> BorrowMut<T> for T where
    T: ?Sized, 
 
impl<T> BorrowMut<T> for T where
    T: ?Sized, 
const: unstable · sourcefn borrow_mut(&mut self) -> &mut T
 
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more