esp32s2/uhci0/
dma_in_status.rs

1#[doc = "Register `DMA_IN_STATUS` reader"]
2pub type R = crate::R<DMA_IN_STATUS_SPEC>;
3#[doc = "Field `IN_FULL` reader - Data-input FIFO full signal."]
4pub type IN_FULL_R = crate::BitReader;
5#[doc = "Field `IN_EMPTY` reader - Data-input FIFO empty signal."]
6pub type IN_EMPTY_R = crate::BitReader;
7#[doc = "Field `RX_ERR_CAUSE` reader - This register indicates the error type when DMA has received a packet with error. 3'b001: Checksum error in the HCI packet; 3'b010: Sequence number error in the HCI packet; 3'b011: CRC bit error in the HCI packet; 3'b100: 0xC0 is found but the received HCI packet is not end; 3'b101: 0xC0 is not found when the HCI packet has been received; 3'b110: CRC check error."]
8pub type RX_ERR_CAUSE_R = crate::FieldReader;
9impl R {
10    #[doc = "Bit 0 - Data-input FIFO full signal."]
11    #[inline(always)]
12    pub fn in_full(&self) -> IN_FULL_R {
13        IN_FULL_R::new((self.bits & 1) != 0)
14    }
15    #[doc = "Bit 1 - Data-input FIFO empty signal."]
16    #[inline(always)]
17    pub fn in_empty(&self) -> IN_EMPTY_R {
18        IN_EMPTY_R::new(((self.bits >> 1) & 1) != 0)
19    }
20    #[doc = "Bits 4:6 - This register indicates the error type when DMA has received a packet with error. 3'b001: Checksum error in the HCI packet; 3'b010: Sequence number error in the HCI packet; 3'b011: CRC bit error in the HCI packet; 3'b100: 0xC0 is found but the received HCI packet is not end; 3'b101: 0xC0 is not found when the HCI packet has been received; 3'b110: CRC check error."]
21    #[inline(always)]
22    pub fn rx_err_cause(&self) -> RX_ERR_CAUSE_R {
23        RX_ERR_CAUSE_R::new(((self.bits >> 4) & 7) as u8)
24    }
25}
26#[cfg(feature = "impl-register-debug")]
27impl core::fmt::Debug for R {
28    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
29        f.debug_struct("DMA_IN_STATUS")
30            .field("in_full", &self.in_full())
31            .field("in_empty", &self.in_empty())
32            .field("rx_err_cause", &self.rx_err_cause())
33            .finish()
34    }
35}
36#[doc = "UHCI data-input status register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_in_status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
37pub struct DMA_IN_STATUS_SPEC;
38impl crate::RegisterSpec for DMA_IN_STATUS_SPEC {
39    type Ux = u32;
40}
41#[doc = "`read()` method returns [`dma_in_status::R`](R) reader structure"]
42impl crate::Readable for DMA_IN_STATUS_SPEC {}
43#[doc = "`reset()` method sets DMA_IN_STATUS to value 0x02"]
44impl crate::Resettable for DMA_IN_STATUS_SPEC {
45    const RESET_VALUE: u32 = 0x02;
46}