esp32s2/rtc_cntl/
timer4.rs1#[doc = "Register `TIMER4` reader"]
2pub type R = crate::R<TIMER4_SPEC>;
3#[doc = "Register `TIMER4` writer"]
4pub type W = crate::W<TIMER4_SPEC>;
5#[doc = "Field `WAIT_TIMER` reader - "]
6pub type WAIT_TIMER_R = crate::FieldReader<u16>;
7#[doc = "Field `WAIT_TIMER` writer - "]
8pub type WAIT_TIMER_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>;
9#[doc = "Field `POWERUP_TIMER` reader - "]
10pub type POWERUP_TIMER_R = crate::FieldReader;
11#[doc = "Field `POWERUP_TIMER` writer - "]
12pub type POWERUP_TIMER_W<'a, REG> = crate::FieldWriter<'a, REG, 7>;
13#[doc = "Field `DG_WRAP_WAIT_TIMER` reader - "]
14pub type DG_WRAP_WAIT_TIMER_R = crate::FieldReader<u16>;
15#[doc = "Field `DG_WRAP_WAIT_TIMER` writer - "]
16pub type DG_WRAP_WAIT_TIMER_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>;
17#[doc = "Field `DG_WRAP_POWERUP_TIMER` reader - "]
18pub type DG_WRAP_POWERUP_TIMER_R = crate::FieldReader;
19#[doc = "Field `DG_WRAP_POWERUP_TIMER` writer - "]
20pub type DG_WRAP_POWERUP_TIMER_W<'a, REG> = crate::FieldWriter<'a, REG, 7>;
21impl R {
22 #[doc = "Bits 0:8"]
23 #[inline(always)]
24 pub fn wait_timer(&self) -> WAIT_TIMER_R {
25 WAIT_TIMER_R::new((self.bits & 0x01ff) as u16)
26 }
27 #[doc = "Bits 9:15"]
28 #[inline(always)]
29 pub fn powerup_timer(&self) -> POWERUP_TIMER_R {
30 POWERUP_TIMER_R::new(((self.bits >> 9) & 0x7f) as u8)
31 }
32 #[doc = "Bits 16:24"]
33 #[inline(always)]
34 pub fn dg_wrap_wait_timer(&self) -> DG_WRAP_WAIT_TIMER_R {
35 DG_WRAP_WAIT_TIMER_R::new(((self.bits >> 16) & 0x01ff) as u16)
36 }
37 #[doc = "Bits 25:31"]
38 #[inline(always)]
39 pub fn dg_wrap_powerup_timer(&self) -> DG_WRAP_POWERUP_TIMER_R {
40 DG_WRAP_POWERUP_TIMER_R::new(((self.bits >> 25) & 0x7f) as u8)
41 }
42}
43#[cfg(feature = "impl-register-debug")]
44impl core::fmt::Debug for R {
45 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
46 f.debug_struct("TIMER4")
47 .field("wait_timer", &self.wait_timer())
48 .field("powerup_timer", &self.powerup_timer())
49 .field("dg_wrap_wait_timer", &self.dg_wrap_wait_timer())
50 .field("dg_wrap_powerup_timer", &self.dg_wrap_powerup_timer())
51 .finish()
52 }
53}
54impl W {
55 #[doc = "Bits 0:8"]
56 #[inline(always)]
57 pub fn wait_timer(&mut self) -> WAIT_TIMER_W<TIMER4_SPEC> {
58 WAIT_TIMER_W::new(self, 0)
59 }
60 #[doc = "Bits 9:15"]
61 #[inline(always)]
62 pub fn powerup_timer(&mut self) -> POWERUP_TIMER_W<TIMER4_SPEC> {
63 POWERUP_TIMER_W::new(self, 9)
64 }
65 #[doc = "Bits 16:24"]
66 #[inline(always)]
67 pub fn dg_wrap_wait_timer(&mut self) -> DG_WRAP_WAIT_TIMER_W<TIMER4_SPEC> {
68 DG_WRAP_WAIT_TIMER_W::new(self, 16)
69 }
70 #[doc = "Bits 25:31"]
71 #[inline(always)]
72 pub fn dg_wrap_powerup_timer(&mut self) -> DG_WRAP_POWERUP_TIMER_W<TIMER4_SPEC> {
73 DG_WRAP_POWERUP_TIMER_W::new(self, 25)
74 }
75}
76#[doc = "configure some wait time for power on\n\nYou can [`read`](crate::Reg::read) this register and get [`timer4::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer4::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
77pub struct TIMER4_SPEC;
78impl crate::RegisterSpec for TIMER4_SPEC {
79 type Ux = u32;
80}
81#[doc = "`read()` method returns [`timer4::R`](R) reader structure"]
82impl crate::Readable for TIMER4_SPEC {}
83#[doc = "`write(|w| ..)` method takes [`timer4::W`](W) writer structure"]
84impl crate::Writable for TIMER4_SPEC {
85 type Safety = crate::Unsafe;
86}
87#[doc = "`reset()` method sets TIMER4 to value 0x1020_0a08"]
88impl crate::Resettable for TIMER4_SPEC {
89 const RESET_VALUE: u32 = 0x1020_0a08;
90}