Type Alias R

pub type R = R<PIN_SPEC>;

Register PIN%s reader

Aliased Type

pub struct R { /* private fields */ }

Implementations

impl R

pub fn sync2_bypass(&self) -> SYNC2_BYPASS_R

Bits 0:1 - For the second stage synchronization, GPIO input data can be syn- chronized on either edge of the APB clock. 0: no synchronization; 1: synchronized on falling edge; 2 and 3: synchronized on rising edge.

pub fn pad_driver(&self) -> PAD_DRIVER_R

Bit 2 - Pad driver selection. 0: normal output; 1: open drain output..

pub fn sync1_bypass(&self) -> SYNC1_BYPASS_R

Bits 3:4 - For the first stage synchronization, GPIO input data can be synchro- nized on either edge of the APB clock. 0: no synchronization; 1: synchronized on falling edge; 2 and 3: synchronized on rising edge.

pub fn int_type(&self) -> INT_TYPE_R

Bits 7:9 - Interrupt type selection. 0: GPIO interrupt disabled; 1: rising edge trigger; 2: falling edge trigger; 3: any edge trigger; 4: low level trigger; 5: high level trigger. (R/W)

pub fn wakeup_enable(&self) -> WAKEUP_ENABLE_R

Bit 10 - GPIO wake-up enable bit, only wakes up the CPU from Light-sleep.

pub fn config(&self) -> CONFIG_R

Bits 11:12 - Reserved

pub fn int_ena(&self) -> INT_ENA_R

Bits 13:17 - Interrupt enable bits. bit13: CPU interrupt enabled; bit14: CPU non-maskable interrupt enabled.