esp32s2/extmem/
pro_cache_mmu_power_ctrl.rs

1#[doc = "Register `PRO_CACHE_MMU_POWER_CTRL` reader"]
2pub type R = crate::R<PRO_CACHE_MMU_POWER_CTRL_SPEC>;
3#[doc = "Register `PRO_CACHE_MMU_POWER_CTRL` writer"]
4pub type W = crate::W<PRO_CACHE_MMU_POWER_CTRL_SPEC>;
5#[doc = "Field `PRO_CACHE_MMU_MEM_FORCE_ON` reader - The bit is used to enable clock gating to save power when access mmu memory, 0: enable, 1: disable"]
6pub type PRO_CACHE_MMU_MEM_FORCE_ON_R = crate::BitReader;
7#[doc = "Field `PRO_CACHE_MMU_MEM_FORCE_ON` writer - The bit is used to enable clock gating to save power when access mmu memory, 0: enable, 1: disable"]
8pub type PRO_CACHE_MMU_MEM_FORCE_ON_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `PRO_CACHE_MMU_MEM_FORCE_PD` reader - The bit is used to power mmu memory down, 0: follow_rtc_lslp_pd, 1: power down"]
10pub type PRO_CACHE_MMU_MEM_FORCE_PD_R = crate::BitReader;
11#[doc = "Field `PRO_CACHE_MMU_MEM_FORCE_PD` writer - The bit is used to power mmu memory down, 0: follow_rtc_lslp_pd, 1: power down"]
12pub type PRO_CACHE_MMU_MEM_FORCE_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `PRO_CACHE_MMU_MEM_FORCE_PU` reader - The bit is used to power mmu memory down, 0: follow_rtc_lslp_pd, 1: power up"]
14pub type PRO_CACHE_MMU_MEM_FORCE_PU_R = crate::BitReader;
15#[doc = "Field `PRO_CACHE_MMU_MEM_FORCE_PU` writer - The bit is used to power mmu memory down, 0: follow_rtc_lslp_pd, 1: power up"]
16pub type PRO_CACHE_MMU_MEM_FORCE_PU_W<'a, REG> = crate::BitWriter<'a, REG>;
17impl R {
18    #[doc = "Bit 0 - The bit is used to enable clock gating to save power when access mmu memory, 0: enable, 1: disable"]
19    #[inline(always)]
20    pub fn pro_cache_mmu_mem_force_on(&self) -> PRO_CACHE_MMU_MEM_FORCE_ON_R {
21        PRO_CACHE_MMU_MEM_FORCE_ON_R::new((self.bits & 1) != 0)
22    }
23    #[doc = "Bit 1 - The bit is used to power mmu memory down, 0: follow_rtc_lslp_pd, 1: power down"]
24    #[inline(always)]
25    pub fn pro_cache_mmu_mem_force_pd(&self) -> PRO_CACHE_MMU_MEM_FORCE_PD_R {
26        PRO_CACHE_MMU_MEM_FORCE_PD_R::new(((self.bits >> 1) & 1) != 0)
27    }
28    #[doc = "Bit 2 - The bit is used to power mmu memory down, 0: follow_rtc_lslp_pd, 1: power up"]
29    #[inline(always)]
30    pub fn pro_cache_mmu_mem_force_pu(&self) -> PRO_CACHE_MMU_MEM_FORCE_PU_R {
31        PRO_CACHE_MMU_MEM_FORCE_PU_R::new(((self.bits >> 2) & 1) != 0)
32    }
33}
34#[cfg(feature = "impl-register-debug")]
35impl core::fmt::Debug for R {
36    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
37        f.debug_struct("PRO_CACHE_MMU_POWER_CTRL")
38            .field(
39                "pro_cache_mmu_mem_force_on",
40                &self.pro_cache_mmu_mem_force_on(),
41            )
42            .field(
43                "pro_cache_mmu_mem_force_pd",
44                &self.pro_cache_mmu_mem_force_pd(),
45            )
46            .field(
47                "pro_cache_mmu_mem_force_pu",
48                &self.pro_cache_mmu_mem_force_pu(),
49            )
50            .finish()
51    }
52}
53impl W {
54    #[doc = "Bit 0 - The bit is used to enable clock gating to save power when access mmu memory, 0: enable, 1: disable"]
55    #[inline(always)]
56    pub fn pro_cache_mmu_mem_force_on(
57        &mut self,
58    ) -> PRO_CACHE_MMU_MEM_FORCE_ON_W<PRO_CACHE_MMU_POWER_CTRL_SPEC> {
59        PRO_CACHE_MMU_MEM_FORCE_ON_W::new(self, 0)
60    }
61    #[doc = "Bit 1 - The bit is used to power mmu memory down, 0: follow_rtc_lslp_pd, 1: power down"]
62    #[inline(always)]
63    pub fn pro_cache_mmu_mem_force_pd(
64        &mut self,
65    ) -> PRO_CACHE_MMU_MEM_FORCE_PD_W<PRO_CACHE_MMU_POWER_CTRL_SPEC> {
66        PRO_CACHE_MMU_MEM_FORCE_PD_W::new(self, 1)
67    }
68    #[doc = "Bit 2 - The bit is used to power mmu memory down, 0: follow_rtc_lslp_pd, 1: power up"]
69    #[inline(always)]
70    pub fn pro_cache_mmu_mem_force_pu(
71        &mut self,
72    ) -> PRO_CACHE_MMU_MEM_FORCE_PU_W<PRO_CACHE_MMU_POWER_CTRL_SPEC> {
73        PRO_CACHE_MMU_MEM_FORCE_PU_W::new(self, 2)
74    }
75}
76#[doc = "register description\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_cache_mmu_power_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pro_cache_mmu_power_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
77pub struct PRO_CACHE_MMU_POWER_CTRL_SPEC;
78impl crate::RegisterSpec for PRO_CACHE_MMU_POWER_CTRL_SPEC {
79    type Ux = u32;
80}
81#[doc = "`read()` method returns [`pro_cache_mmu_power_ctrl::R`](R) reader structure"]
82impl crate::Readable for PRO_CACHE_MMU_POWER_CTRL_SPEC {}
83#[doc = "`write(|w| ..)` method takes [`pro_cache_mmu_power_ctrl::W`](W) writer structure"]
84impl crate::Writable for PRO_CACHE_MMU_POWER_CTRL_SPEC {
85    type Safety = crate::Unsafe;
86}
87#[doc = "`reset()` method sets PRO_CACHE_MMU_POWER_CTRL to value 0x05"]
88impl crate::Resettable for PRO_CACHE_MMU_POWER_CTRL_SPEC {
89    const RESET_VALUE: u32 = 0x05;
90}
esp32s2/extmem/pro_cache_mmu_power_ctrl.rs

esp32s2/extmem/
pro_cache_mmu_power_ctrl.rs
