Type Alias R

pub type R = R<INT_ST_SPEC>;

Register INT_ST reader

Aliased Type

pub struct R { /* private fields */ }

Implementations

impl R

pub fn rx_start(&self) -> RX_START_R

Bit 0 - This is the masked interrupt bit for UHCI_RX_START_INT interrupt when UHCI_RX_START_INT_ENA is set to 1.

pub fn tx_start(&self) -> TX_START_R

Bit 1 - This is the masked interrupt bit for UHCI_TX_START_INT interrupt when UHCI_TX_START_INT_ENA is set to 1.

pub fn rx_hung(&self) -> RX_HUNG_R

Bit 2 - This is the masked interrupt bit for UHCI_RX_HUNG_INT interrupt when UHCI_RX_HUNG_INT_ENA is set to 1.

pub fn tx_hung(&self) -> TX_HUNG_R

Bit 3 - This is the masked interrupt bit for UHCI_TX_HUNG_INT interrupt when UHCI_TX_HUNG_INT_ENA is set to 1.

pub fn in_done(&self) -> IN_DONE_R

Bit 4 - This is the masked interrupt bit for UHCI_IN_DONE_INT interrupt when UHCI_IN_DONE_INT_ENA is set to 1.

pub fn in_suc_eof(&self) -> IN_SUC_EOF_R

Bit 5 - This is the masked interrupt bit for UHCI_IN_SUC_EOF_INT interrupt when UHCI_IN_SUC_EOF_INT_ENA is set to 1.

pub fn in_err_eof(&self) -> IN_ERR_EOF_R

Bit 6 - This is the masked interrupt bit for UHCI_IN_ERR_EOF_INT interrupt when UHCI_IN_ERR_EOF_INT_ENA is set to 1.

pub fn out_done(&self) -> OUT_DONE_R

Bit 7 - This is the masked interrupt bit for UHCI_OUT_DONE_INT interrupt when UHCI_OUT_DONE_INT_ENA is set to 1.

pub fn out_eof(&self) -> OUT_EOF_R

Bit 8 - This is the masked interrupt bit for UHCI_OUT_EOF_INT interrupt when UHCI_OUT_EOF_INT_ENA is set to 1.

pub fn in_dscr_err(&self) -> IN_DSCR_ERR_R

Bit 9 - This is the masked interrupt bit for UHCI_IN_DSCR_ERR_INT interrupt when UHCI_IN_DSCR_ERR_INT is set to 1.

pub fn out_dscr_err(&self) -> OUT_DSCR_ERR_R

Bit 10 - This is the masked interrupt bit for UHCI_OUT_DSCR_ERR_INT interrupt when UHCI_OUT_DSCR_ERR_INT_ENA is set to 1.

pub fn in_dscr_empty(&self) -> IN_DSCR_EMPTY_R

Bit 11 - This is the masked interrupt bit for UHCI_IN_DSCR_EMPTY_INT interrupt when UHCI_IN_DSCR_EMPTY_INT_ENA is set to 1.

pub fn outlink_eof_err(&self) -> OUTLINK_EOF_ERR_R

Bit 12 - This is the masked interrupt bit for UHCI_OUTLINK_EOF_ERR_INT interrupt when UHCI_OUTLINK_EOF_ERR_INT_ENA is set to 1.

pub fn out_total_eof(&self) -> OUT_TOTAL_EOF_R

Bit 13 - This is the masked interrupt bit for UHCI_OUT_TOTAL_EOF_INT interrupt when UHCI_OUT_TOTAL_EOF_INT_ENA is set to 1.

pub fn send_s_reg_q(&self) -> SEND_S_REG_Q_R

Bit 14 - This is the masked interrupt bit for UHCI_SEND_S_REG_Q_INT interrupt when UHCI_SEND_S_REG_Q_INT_ENA is set to 1.

pub fn send_a_reg_q(&self) -> SEND_A_REG_Q_R

Bit 15 - This is the masked interrupt bit for UHCI_SEND_A_REG_Q_INT interrupt when UHCI_SEND_A_REG_Q_INT_ENA is set to 1.

pub fn dma_infifo_full_wm(&self) -> DMA_INFIFO_FULL_WM_R

Bit 16 - This is the masked interrupt bit for UHCI_DMA_INFIFO_FULL_WM_INT INTERRUPT when UHCI_DMA_INFIFO_FULL_WM_INT_ENA is set to 1.