1#[repr(C)]
2#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5 ch: [CH; 8],
6 timer: [TIMER; 4],
7 int_raw: INT_RAW,
8 int_st: INT_ST,
9 int_ena: INT_ENA,
10 int_clr: INT_CLR,
11 conf: CONF,
12 _reserved7: [u8; 0x28],
13 date: DATE,
14}
15impl RegisterBlock {
16 #[doc = "0x00..0xa0 - Cluster CH%s, containing CH?_CONF0, CH?_HPOINT, CH?_DUTY, CH?_CONF1, CH?_DUTY_R"]
17 #[inline(always)]
18 pub const fn ch(&self, n: usize) -> &CH {
19 &self.ch[n]
20 }
21 #[doc = "Iterator for array of:"]
22 #[doc = "0x00..0xa0 - Cluster CH%s, containing CH?_CONF0, CH?_HPOINT, CH?_DUTY, CH?_CONF1, CH?_DUTY_R"]
23 #[inline(always)]
24 pub fn ch_iter(&self) -> impl Iterator<Item = &CH> {
25 self.ch.iter()
26 }
27 #[doc = "0xa0..0xc0 - Cluster TIMER%s, containing TIMER?_CONF, TIMER?_VALUE"]
28 #[inline(always)]
29 pub const fn timer(&self, n: usize) -> &TIMER {
30 &self.timer[n]
31 }
32 #[doc = "Iterator for array of:"]
33 #[doc = "0xa0..0xc0 - Cluster TIMER%s, containing TIMER?_CONF, TIMER?_VALUE"]
34 #[inline(always)]
35 pub fn timer_iter(&self) -> impl Iterator<Item = &TIMER> {
36 self.timer.iter()
37 }
38 #[doc = "0xc0 - Raw interrupt status"]
39 #[inline(always)]
40 pub const fn int_raw(&self) -> &INT_RAW {
41 &self.int_raw
42 }
43 #[doc = "0xc4 - Masked interrupt status"]
44 #[inline(always)]
45 pub const fn int_st(&self) -> &INT_ST {
46 &self.int_st
47 }
48 #[doc = "0xc8 - Interrupt enable bits"]
49 #[inline(always)]
50 pub const fn int_ena(&self) -> &INT_ENA {
51 &self.int_ena
52 }
53 #[doc = "0xcc - Interrupt clear bits"]
54 #[inline(always)]
55 pub const fn int_clr(&self) -> &INT_CLR {
56 &self.int_clr
57 }
58 #[doc = "0xd0 - Global ledc configuration register"]
59 #[inline(always)]
60 pub const fn conf(&self) -> &CONF {
61 &self.conf
62 }
63 #[doc = "0xfc - Version control register"]
64 #[inline(always)]
65 pub const fn date(&self) -> &DATE {
66 &self.date
67 }
68}
69#[doc = "Cluster CH%s, containing CH?_CONF0, CH?_HPOINT, CH?_DUTY, CH?_CONF1, CH?_DUTY_R"]
70pub use self::ch::CH;
71#[doc = r"Cluster"]
72#[doc = "Cluster CH%s, containing CH?_CONF0, CH?_HPOINT, CH?_DUTY, CH?_CONF1, CH?_DUTY_R"]
73pub mod ch;
74#[doc = "Cluster TIMER%s, containing TIMER?_CONF, TIMER?_VALUE"]
75pub use self::timer::TIMER;
76#[doc = r"Cluster"]
77#[doc = "Cluster TIMER%s, containing TIMER?_CONF, TIMER?_VALUE"]
78pub mod timer;
79#[doc = "INT_RAW (rw) register accessor: Raw interrupt status\n\nYou can [`read`](crate::Reg::read) this register and get [`int_raw::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_raw::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_raw`] module"]
80pub type INT_RAW = crate::Reg<int_raw::INT_RAW_SPEC>;
81#[doc = "Raw interrupt status"]
82pub mod int_raw;
83#[doc = "INT_ST (r) register accessor: Masked interrupt status\n\nYou can [`read`](crate::Reg::read) this register and get [`int_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_st`] module"]
84pub type INT_ST = crate::Reg<int_st::INT_ST_SPEC>;
85#[doc = "Masked interrupt status"]
86pub mod int_st;
87#[doc = "INT_ENA (rw) register accessor: Interrupt enable bits\n\nYou can [`read`](crate::Reg::read) this register and get [`int_ena::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_ena::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_ena`] module"]
88pub type INT_ENA = crate::Reg<int_ena::INT_ENA_SPEC>;
89#[doc = "Interrupt enable bits"]
90pub mod int_ena;
91#[doc = "INT_CLR (w) register accessor: Interrupt clear bits\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_clr`] module"]
92pub type INT_CLR = crate::Reg<int_clr::INT_CLR_SPEC>;
93#[doc = "Interrupt clear bits"]
94pub mod int_clr;
95#[doc = "CONF (rw) register accessor: Global ledc configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@conf`] module"]
96pub type CONF = crate::Reg<conf::CONF_SPEC>;
97#[doc = "Global ledc configuration register"]
98pub mod conf;
99#[doc = "DATE (rw) register accessor: Version control register\n\nYou can [`read`](crate::Reg::read) this register and get [`date::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`date::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@date`] module"]
100pub type DATE = crate::Reg<date::DATE_SPEC>;
101#[doc = "Version control register"]
102pub mod date;