esp32s2/timg0/
lactrtc.rs

1#[doc = "Register `LACTRTC` reader"]
2pub type R = crate::R<LACTRTC_SPEC>;
3#[doc = "Register `LACTRTC` writer"]
4pub type W = crate::W<LACTRTC_SPEC>;
5#[doc = "Field `RTC_STEP_LEN` reader - Reserved."]
6pub type RTC_STEP_LEN_R = crate::FieldReader<u32>;
7#[doc = "Field `RTC_STEP_LEN` writer - Reserved."]
8pub type RTC_STEP_LEN_W<'a, REG> = crate::FieldWriter<'a, REG, 26, u32>;
9impl R {
10    #[doc = "Bits 6:31 - Reserved."]
11    #[inline(always)]
12    pub fn rtc_step_len(&self) -> RTC_STEP_LEN_R {
13        RTC_STEP_LEN_R::new((self.bits >> 6) & 0x03ff_ffff)
14    }
15}
16#[cfg(feature = "impl-register-debug")]
17impl core::fmt::Debug for R {
18    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19        f.debug_struct("LACTRTC")
20            .field("rtc_step_len", &self.rtc_step_len())
21            .finish()
22    }
23}
24impl W {
25    #[doc = "Bits 6:31 - Reserved."]
26    #[inline(always)]
27    pub fn rtc_step_len(&mut self) -> RTC_STEP_LEN_W<LACTRTC_SPEC> {
28        RTC_STEP_LEN_W::new(self, 6)
29    }
30}
31#[doc = "LACT RTC register\n\nYou can [`read`](crate::Reg::read) this register and get [`lactrtc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lactrtc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
32pub struct LACTRTC_SPEC;
33impl crate::RegisterSpec for LACTRTC_SPEC {
34    type Ux = u32;
35}
36#[doc = "`read()` method returns [`lactrtc::R`](R) reader structure"]
37impl crate::Readable for LACTRTC_SPEC {}
38#[doc = "`write(|w| ..)` method takes [`lactrtc::W`](W) writer structure"]
39impl crate::Writable for LACTRTC_SPEC {
40    type Safety = crate::Unsafe;
41    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
42    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
43}
44#[doc = "`reset()` method sets LACTRTC to value 0"]
45impl crate::Resettable for LACTRTC_SPEC {
46    const RESET_VALUE: u32 = 0;
47}