esp32s2::uhci0

Struct RegisterBlock

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#[repr(C)]
pub struct RegisterBlock { /* private fields */ }
Expand description

Register block

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impl RegisterBlock

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pub const fn conf0(&self) -> &CONF0

0x00 - UHCI configuration register

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pub const fn int_raw(&self) -> &INT_RAW

0x04 - Raw interrupt status

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pub const fn int_st(&self) -> &INT_ST

0x08 - Masked interrupt status

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pub const fn int_ena(&self) -> &INT_ENA

0x0c - Interrupt enable bits

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pub const fn int_clr(&self) -> &INT_CLR

0x10 - Interrupt clear bits

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pub const fn dma_out_status(&self) -> &DMA_OUT_STATUS

0x14 - DMA data-output status register

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pub const fn dma_out_push(&self) -> &DMA_OUT_PUSH

0x18 - Push control register of TX FIFO

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pub const fn dma_in_status(&self) -> &DMA_IN_STATUS

0x1c - UHCI data-input status register

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pub const fn dma_in_pop(&self) -> &DMA_IN_POP

0x20 - Pop control register of RX FIFO

0x24 - Link descriptor address and control

0x28 - Link descriptor address and control

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pub const fn conf1(&self) -> &CONF1

0x2c - UHCI configuration register

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pub const fn state0(&self) -> &STATE0

0x30 - UHCI decoder status register

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pub const fn state1(&self) -> &STATE1

0x34 - UHCI encoder status register

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pub const fn dma_out_eof_des_addr(&self) -> &DMA_OUT_EOF_DES_ADDR

0x38 - Outlink descriptor address when EOF occurs

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pub const fn dma_in_suc_eof_des_addr(&self) -> &DMA_IN_SUC_EOF_DES_ADDR

0x3c - Inlink descriptor address when EOF occurs

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pub const fn dma_in_err_eof_des_addr(&self) -> &DMA_IN_ERR_EOF_DES_ADDR

0x40 - Inlink descriptor address when errors occur

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pub const fn dma_out_eof_bfr_des_addr(&self) -> &DMA_OUT_EOF_BFR_DES_ADDR

0x44 - Outlink descriptor address before the last transmit descriptor

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pub const fn ahb_test(&self) -> &AHB_TEST

0x48 - AHB test register

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pub const fn dma_in_dscr(&self) -> &DMA_IN_DSCR

0x4c - The third word of the next receive descriptor

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pub const fn dma_in_dscr_bf0(&self) -> &DMA_IN_DSCR_BF0

0x50 - The third word of current receive descriptor

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pub const fn dma_out_dscr(&self) -> &DMA_OUT_DSCR

0x58 - The third word of the next transmit descriptor

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pub const fn dma_out_dscr_bf0(&self) -> &DMA_OUT_DSCR_BF0

0x5c - The third word of current transmit descriptor

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pub const fn escape_conf(&self) -> &ESCAPE_CONF

0x64 - Escape character configuration

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pub const fn hung_conf(&self) -> &HUNG_CONF

0x68 - Timeout configuration

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pub const fn rx_head(&self) -> &RX_HEAD

0x70 - UHCI packet header register

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pub const fn quick_sent(&self) -> &QUICK_SENT

0x74 - UHCI quick_sent configuration register

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pub const fn q(&self, n: usize) -> &Q

0x78..0xb0 - Cluster Q%s, containing Q?_WORD0, Q?_WORD1

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pub fn q_iter(&self) -> impl Iterator<Item = &Q>

Iterator for array of: 0x78..0xb0 - Cluster Q%s, containing Q?_WORD0, Q?_WORD1

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pub const fn esc_conf(&self, n: usize) -> &ESC_CONF

0xb0..0xc0 - Escape sequence configuration register %s

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pub fn esc_conf_iter(&self) -> impl Iterator<Item = &ESC_CONF>

Iterator for array of: 0xb0..0xc0 - Escape sequence configuration register %s

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pub const fn pkt_thres(&self) -> &PKT_THRES

0xc0 - Configure register for packet length

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pub const fn date(&self) -> &DATE

0xfc - UHCI version control register

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