Module spi0

SPI (Serial Peripheral Interface) Controller 0

Modules

addr

Address value

cache_sctrl

SPI Memory Cache SCTRL Register

clock

SPI clock control register

clock_gate

SPI Memory Clock Gate Register

cmd

Command control register

ctrl

SPI control register

ctrl1

SPI control register 1

ctrl2

SPI control register 2

din_mode

SPI input delay mode configuration

din_num

SPI input delay number configuration

dma_conf

SPI DMA control register

dma_in_link

SPI DMA RX link configuration

dma_instatus

SPI DMA RX status

dma_int_clr

SPI DMA interrupt clear register

dma_int_ena

SPI DMA interrupt enable register

dma_int_raw

SPI DMA interrupt raw register

dma_int_st

SPI DMA interrupt status register

dma_out_link

SPI DMA TX link configuration

dma_outstatus

SPI DMA TX status

dout_mode

SPI output delay mode configuration

dout_num

SPI output delay number configuration

fsm

SPI master status and DMA read byte control register

hold

SPI hold register

in_err_eof_des_addr

The latest SPI DMA RX descriptor address receiving error

in_suc_eof_des_addr

The latest SPI DMA eof RX descriptor address

inlink_dscr

Current SPI DMA RX descriptor pointer

inlink_dscr_bf0

Next SPI DMA RX descriptor pointer

inlink_dscr_bf1

Current SPI DMA RX buffer pointer

lcd_ctrl

LCD frame control register

lcd_ctrl1

LCD frame control1 register

lcd_ctrl2

LCD frame control2 register

lcd_d_mode

LCD delay number

lcd_d_num

LCD delay mode

misc

SPI misc register

miso_dlen

MISO length

mosi_dlen

MOSI length

out_eof_bfr_des_addr

The latest SPI DMA eof TX buffer address

out_eof_des_addr

The latest SPI DMA eof TX descriptor address

outlink_dscr

Current SPI DMA TX descriptor pointer

outlink_dscr_bf0

Next SPI DMA TX descriptor pointer

outlink_dscr_bf1

Current SPI DMA TX buffer pointer

reg_date

SPI version control

slave

SPI slave control register

slave1

SPI slave control register 1

slv_rd_byte

SPI interrupt control register

slv_rdbuf_dlen

SPI magic error and slave control register

slv_wrbuf_dlen

SPI slave Wr_BUF interrupt and CONF control register

sram_clk

SPI Memory SRAM Clock Register

sram_drd_cmd

SPI Memory SRAM DRD CMD Register

sram_dwr_cmd

SPI Memory SRAM DWR CMD Register

user

SPI USER control register

user1

SPI USER control register 1

user2

SPI USER control register 2

w

Data buffer %s

Structs

RegisterBlock

Register block

Type Aliases

ADDR

ADDR (rw) register accessor: Address value

CACHE_SCTRL

CACHE_SCTRL (rw) register accessor: SPI Memory Cache SCTRL Register

CLOCK

CLOCK (rw) register accessor: SPI clock control register

CLOCK_GATE

CLOCK_GATE (rw) register accessor: SPI Memory Clock Gate Register

CMD

CMD (rw) register accessor: Command control register

CTRL

CTRL (rw) register accessor: SPI control register

CTRL1

CTRL1 (rw) register accessor: SPI control register 1

CTRL2

CTRL2 (rw) register accessor: SPI control register 2

DIN_MODE

DIN_MODE (rw) register accessor: SPI input delay mode configuration

DIN_NUM

DIN_NUM (rw) register accessor: SPI input delay number configuration

DMA_CONF

DMA_CONF (rw) register accessor: SPI DMA control register

DMA_INSTATUS

DMA_INSTATUS (r) register accessor: SPI DMA RX status

DMA_INT_CLR

DMA_INT_CLR (rw) register accessor: SPI DMA interrupt clear register

DMA_INT_ENA

DMA_INT_ENA (rw) register accessor: SPI DMA interrupt enable register

DMA_INT_RAW

DMA_INT_RAW (rw) register accessor: SPI DMA interrupt raw register

DMA_INT_ST

DMA_INT_ST (rw) register accessor: SPI DMA interrupt status register

DMA_IN_LINK

DMA_IN_LINK (rw) register accessor: SPI DMA RX link configuration

DMA_OUTSTATUS

DMA_OUTSTATUS (r) register accessor: SPI DMA TX status

DMA_OUT_LINK

DMA_OUT_LINK (rw) register accessor: SPI DMA TX link configuration

DOUT_MODE

DOUT_MODE (rw) register accessor: SPI output delay mode configuration

DOUT_NUM

DOUT_NUM (rw) register accessor: SPI output delay number configuration

FSM

FSM (rw) register accessor: SPI master status and DMA read byte control register

HOLD

HOLD (rw) register accessor: SPI hold register

INLINK_DSCR

INLINK_DSCR (r) register accessor: Current SPI DMA RX descriptor pointer

INLINK_DSCR_BF0

INLINK_DSCR_BF0 (r) register accessor: Next SPI DMA RX descriptor pointer

INLINK_DSCR_BF1

INLINK_DSCR_BF1 (r) register accessor: Current SPI DMA RX buffer pointer

IN_ERR_EOF_DES_ADDR

IN_ERR_EOF_DES_ADDR (r) register accessor: The latest SPI DMA RX descriptor address receiving error

IN_SUC_EOF_DES_ADDR

IN_SUC_EOF_DES_ADDR (r) register accessor: The latest SPI DMA eof RX descriptor address

LCD_CTRL

LCD_CTRL (rw) register accessor: LCD frame control register

LCD_CTRL1

LCD_CTRL1 (rw) register accessor: LCD frame control1 register

LCD_CTRL2

LCD_CTRL2 (rw) register accessor: LCD frame control2 register

LCD_D_MODE

LCD_D_MODE (rw) register accessor: LCD delay number

LCD_D_NUM

LCD_D_NUM (rw) register accessor: LCD delay mode

MISC

MISC (rw) register accessor: SPI misc register

MISO_DLEN

MISO_DLEN (rw) register accessor: MISO length

MOSI_DLEN

MOSI_DLEN (rw) register accessor: MOSI length

OUTLINK_DSCR

OUTLINK_DSCR (r) register accessor: Current SPI DMA TX descriptor pointer

OUTLINK_DSCR_BF0

OUTLINK_DSCR_BF0 (r) register accessor: Next SPI DMA TX descriptor pointer

OUTLINK_DSCR_BF1

OUTLINK_DSCR_BF1 (r) register accessor: Current SPI DMA TX buffer pointer

OUT_EOF_BFR_DES_ADDR

OUT_EOF_BFR_DES_ADDR (r) register accessor: The latest SPI DMA eof TX buffer address

OUT_EOF_DES_ADDR

OUT_EOF_DES_ADDR (r) register accessor: The latest SPI DMA eof TX descriptor address

REG_DATE

REG_DATE (rw) register accessor: SPI version control

SLAVE

SLAVE (rw) register accessor: SPI slave control register

SLAVE1

SLAVE1 (rw) register accessor: SPI slave control register 1

SLV_RDBUF_DLEN

SLV_RDBUF_DLEN (rw) register accessor: SPI magic error and slave control register

SLV_RD_BYTE

SLV_RD_BYTE (rw) register accessor: SPI interrupt control register

SLV_WRBUF_DLEN

SLV_WRBUF_DLEN (rw) register accessor: SPI slave Wr_BUF interrupt and CONF control register

SRAM_CLK

SRAM_CLK (rw) register accessor: SPI Memory SRAM Clock Register

SRAM_DRD_CMD

SRAM_DRD_CMD (rw) register accessor: SPI Memory SRAM DRD CMD Register

SRAM_DWR_CMD

SRAM_DWR_CMD (rw) register accessor: SPI Memory SRAM DWR CMD Register

USER

USER (rw) register accessor: SPI USER control register

USER1

USER1 (rw) register accessor: SPI USER control register 1

USER2

USER2 (rw) register accessor: SPI USER control register 2

W

W (rw) register accessor: Data buffer %s