Type Alias esp32s2::spi0::ctrl2::R

pub type R = R<CTRL2_SPEC>;

Register CTRL2 reader

Aliased Type

struct R { /* private fields */ }

Implementations

impl R

pub fn cs_setup_time(&self) -> CS_SETUP_TIME_R

Bits 0:12 - (cycles+1) of prepare phase by spi clock this bits are combined with SPI_CS_SETUP bit. Can be configured in CONF state.

pub fn cs_hold_time(&self) -> CS_HOLD_TIME_R

Bits 13:25 - delay cycles of cs pin by spi clock this bits are combined with SPI_CS_HOLD bit. Can be configured in CONF state.

pub fn cs_delay_mode(&self) -> CS_DELAY_MODE_R

Bits 26:28 - spi_cs signal is delayed by spi_clk . 0: zero 1: if SPI_CK_OUT_EDGE or SPI_CK_IDLE_EDGE is set 1 delayed by half cycle else delayed by one cycle 2: if SPI_CK_OUT_EDGE or SPI_CK_IDLE_EDGE is set 1 delayed by one cycle, else delayed by half cycle 3: delayed one cycle. Can be configured in CONF state.

pub fn cs_delay_num(&self) -> CS_DELAY_NUM_R

Bits 29:30 - spi_cs signal is delayed by system clock cycles. Can be configured in CONF state.