Expand description
FIFO configuration register
Structs§
- FIFO configuration register
Type Aliases§
- Field
FIFO_ADDR_CFG_ENreader - When this bit is set to 1, the byte received after the I2C address byte represents the offset address in the I2C Slave RAM. - Field
FIFO_ADDR_CFG_ENwriter - When this bit is set to 1, the byte received after the I2C address byte represents the offset address in the I2C Slave RAM. - Field
FIFO_PRT_ENreader - The control enable bit of FIFO pointer in non-FIFO mode. This bit controls the valid bits and the interrupts of TX/RX FIFO overflow, underflow, full and empty. - Field
FIFO_PRT_ENwriter - The control enable bit of FIFO pointer in non-FIFO mode. This bit controls the valid bits and the interrupts of TX/RX FIFO overflow, underflow, full and empty. - Field
NONFIFO_ENreader - Set this bit to enable APB non-FIFO mode. - Field
NONFIFO_ENwriter - Set this bit to enable APB non-FIFO mode. - Field
NONFIFO_RX_THRESreader - When I2C receives more than I2C_NONFIFO_RX_THRES bytes of data, it will generate an I2C_RXFIFO_UDF_INT interrupt and update the current offset address of the received data. - Field
NONFIFO_RX_THRESwriter - When I2C receives more than I2C_NONFIFO_RX_THRES bytes of data, it will generate an I2C_RXFIFO_UDF_INT interrupt and update the current offset address of the received data. - Field
NONFIFO_TX_THRESreader - When I2C sends more than I2C_NONFIFO_TX_THRES bytes of data, it will generate an I2C_TXFIFO_OVF_INT interrupt and update the current offset address of the sent data. - Field
NONFIFO_TX_THRESwriter - When I2C sends more than I2C_NONFIFO_TX_THRES bytes of data, it will generate an I2C_TXFIFO_OVF_INT interrupt and update the current offset address of the sent data. - Register
FIFO_CONFreader - Field
RXFIFO_WM_THRHDreader - The water mark threshold of RX FIFO in non-FIFO mode. When I2C_FIFO_PRT_EN is 1 and RX FIFO counter is bigger than I2C_RXFIFO_WM_THRHD[4:0], I2C_RXFIFO_WM_INT_RAW bit will be valid. - Field
RXFIFO_WM_THRHDwriter - The water mark threshold of RX FIFO in non-FIFO mode. When I2C_FIFO_PRT_EN is 1 and RX FIFO counter is bigger than I2C_RXFIFO_WM_THRHD[4:0], I2C_RXFIFO_WM_INT_RAW bit will be valid. - Field
RX_FIFO_RSTreader - Set this bit to reset RX FIFO. - Field
RX_FIFO_RSTwriter - Set this bit to reset RX FIFO. - Field
TXFIFO_WM_THRHDreader - The water mark threshold of TX FIFO in non-FIFO mode. When I2C_FIFO_PRT_EN is 1 and TX FIFO counter is smaller than I2C_TXFIFO_WM_THRHD[4:0], I2C_TXFIFO_WM_INT_RAW bit will be valid. - Field
TXFIFO_WM_THRHDwriter - The water mark threshold of TX FIFO in non-FIFO mode. When I2C_FIFO_PRT_EN is 1 and TX FIFO counter is smaller than I2C_TXFIFO_WM_THRHD[4:0], I2C_TXFIFO_WM_INT_RAW bit will be valid. - Field
TX_FIFO_RSTreader - Set this bit to reset TX FIFO. - Field
TX_FIFO_RSTwriter - Set this bit to reset TX FIFO. - Register
FIFO_CONFwriter