Module esp32s2::i2c0::fifo_conf

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FIFO configuration register

Structs§

Type Aliases§

  • Field FIFO_ADDR_CFG_EN reader - When this bit is set to 1, the byte received after the I2C address byte represents the offset address in the I2C Slave RAM.
  • Field FIFO_ADDR_CFG_EN writer - When this bit is set to 1, the byte received after the I2C address byte represents the offset address in the I2C Slave RAM.
  • Field FIFO_PRT_EN reader - The control enable bit of FIFO pointer in non-FIFO mode. This bit controls the valid bits and the interrupts of TX/RX FIFO overflow, underflow, full and empty.
  • Field FIFO_PRT_EN writer - The control enable bit of FIFO pointer in non-FIFO mode. This bit controls the valid bits and the interrupts of TX/RX FIFO overflow, underflow, full and empty.
  • Field NONFIFO_EN reader - Set this bit to enable APB non-FIFO mode.
  • Field NONFIFO_EN writer - Set this bit to enable APB non-FIFO mode.
  • Field NONFIFO_RX_THRES reader - When I2C receives more than I2C_NONFIFO_RX_THRES bytes of data, it will generate an I2C_RXFIFO_UDF_INT interrupt and update the current offset address of the received data.
  • Field NONFIFO_RX_THRES writer - When I2C receives more than I2C_NONFIFO_RX_THRES bytes of data, it will generate an I2C_RXFIFO_UDF_INT interrupt and update the current offset address of the received data.
  • Field NONFIFO_TX_THRES reader - When I2C sends more than I2C_NONFIFO_TX_THRES bytes of data, it will generate an I2C_TXFIFO_OVF_INT interrupt and update the current offset address of the sent data.
  • Field NONFIFO_TX_THRES writer - When I2C sends more than I2C_NONFIFO_TX_THRES bytes of data, it will generate an I2C_TXFIFO_OVF_INT interrupt and update the current offset address of the sent data.
  • Register FIFO_CONF reader
  • Field RXFIFO_WM_THRHD reader - The water mark threshold of RX FIFO in non-FIFO mode. When I2C_FIFO_PRT_EN is 1 and RX FIFO counter is bigger than I2C_RXFIFO_WM_THRHD[4:0], I2C_RXFIFO_WM_INT_RAW bit will be valid.
  • Field RXFIFO_WM_THRHD writer - The water mark threshold of RX FIFO in non-FIFO mode. When I2C_FIFO_PRT_EN is 1 and RX FIFO counter is bigger than I2C_RXFIFO_WM_THRHD[4:0], I2C_RXFIFO_WM_INT_RAW bit will be valid.
  • Field RX_FIFO_RST reader - Set this bit to reset RX FIFO.
  • Field RX_FIFO_RST writer - Set this bit to reset RX FIFO.
  • Field TXFIFO_WM_THRHD reader - The water mark threshold of TX FIFO in non-FIFO mode. When I2C_FIFO_PRT_EN is 1 and TX FIFO counter is smaller than I2C_TXFIFO_WM_THRHD[4:0], I2C_TXFIFO_WM_INT_RAW bit will be valid.
  • Field TXFIFO_WM_THRHD writer - The water mark threshold of TX FIFO in non-FIFO mode. When I2C_FIFO_PRT_EN is 1 and TX FIFO counter is smaller than I2C_TXFIFO_WM_THRHD[4:0], I2C_TXFIFO_WM_INT_RAW bit will be valid.
  • Field TX_FIFO_RST reader - Set this bit to reset TX FIFO.
  • Field TX_FIFO_RST writer - Set this bit to reset TX FIFO.
  • Register FIFO_CONF writer