Struct esp32s2::RTC_CNTL

pub struct RTC_CNTL { /* private fields */ }

Real-Time Clock Control

Implementations

impl RTC_CNTL

pub const PTR: *const RegisterBlock = {0x3f408000 as *const rtc_cntl::RegisterBlock}

Pointer to the register block

pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

pub unsafe fn steal() -> Self

Steal an instance of this peripheral

Safety

Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.

Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.

Methods from Deref<Target = RegisterBlock>

pub fn options0(&self) -> &OPTIONS0

0x00 - Sets the power options of crystal and PLL clocks, and initiates reset by software

pub fn slp_timer0(&self) -> &SLP_TIMER0

0x04 - RTC timer threshold register 0

pub fn slp_timer1(&self) -> &SLP_TIMER1

0x08 - RTC timer threshold register 1

pub fn time_update(&self) -> &TIME_UPDATE

0x0c - RTC timer update control register

pub fn time_low0(&self) -> &TIME_LOW0

0x10 - Stores the lower 32 bits of RTC timer 0.

pub fn time_high0(&self) -> &TIME_HIGH0

0x14 - Stores the higher 16 bits of RTC timer 0

pub fn state0(&self) -> &STATE0

0x18 - Configures the sleep / reject / wakeup state

pub fn timer1(&self) -> &TIMER1

0x1c - Configures CPU stall options

pub fn timer2(&self) -> &TIMER2

0x20 - Configures RTC slow clock and touch controller

pub fn timer3(&self) -> &TIMER3

0x24 - configure some wait time for power on

pub fn timer4(&self) -> &TIMER4

0x28 - configure some wait time for power on

pub fn timer5(&self) -> &TIMER5

0x2c - Configures the minimal sleep cycles

pub fn timer6(&self) -> &TIMER6

0x30 - Configure minimal sleep cycles register

pub fn ana_conf(&self) -> &ANA_CONF

0x34 - Configures the power options for I2C and PLLA

pub fn reset_state(&self) -> &RESET_STATE

0x38 - Indicates the CPU reset source. For more information about the reset cause, please refer to Table \ref{table:resetreasons} in Chapter \ref{module:ResetandClock} \textit{ ameref{module:ResetandClock}}.

pub fn wakeup_state(&self) -> &WAKEUP_STATE

0x3c - Wakeup bitmap enabling register

pub fn int_ena(&self) -> &INT_ENA

0x40 - RTC interrupt enabling register

pub fn int_raw(&self) -> &INT_RAW

0x44 - RTC interrupt raw register

pub fn int_st(&self) -> &INT_ST

0x48 - RTC interrupt state register

pub fn int_clr(&self) -> &INT_CLR

0x4c - RTC interrupt clear register

pub fn store0(&self) -> &STORE0

0x50 - Reservation register 0

pub fn store1(&self) -> &STORE1

0x54 - Reservation register 1

pub fn store2(&self) -> &STORE2

0x58 - Reservation register 2

pub fn store3(&self) -> &STORE3

0x5c - Reservation register 3

pub fn ext_xtl_conf(&self) -> &EXT_XTL_CONF

0x60 - 32 kHz crystal oscillator configuration register

pub fn ext_wakeup_conf(&self) -> &EXT_WAKEUP_CONF

0x64 - GPIO wakeup configuration register

pub fn slp_reject_conf(&self) -> &SLP_REJECT_CONF

0x68 - Configures sleep / reject options

pub fn cpu_period_conf(&self) -> &CPU_PERIOD_CONF

0x6c - CPU sel option

pub fn sdio_act_conf(&self) -> &SDIO_ACT_CONF

0x70 - configure sdio active register

pub fn clk_conf(&self) -> &CLK_CONF

0x74 - RTC clock configuration register

pub fn slow_clk_conf(&self) -> &SLOW_CLK_CONF

0x78 - RTC slow clock configuration register

pub fn sdio_conf(&self) -> &SDIO_CONF

0x7c - configure vddsdio register

pub fn bias_conf(&self) -> &BIAS_CONF

0x80 - configure power register

pub fn reg(&self) -> &REG

0x84 - RTC/DIG regulator configuration register

pub fn pwc(&self) -> &PWC

0x88 - RTC power configuraiton register

pub fn dig_pwc(&self) -> &DIG_PWC

0x8c - Digital system power configuraiton register

pub fn dig_iso(&self) -> &DIG_ISO

0x90 - Digital system ISO configuration register

pub fn wdtconfig0(&self) -> &WDTCONFIG0

0x94 - RTC watchdog configuration register

pub fn wdtconfig1(&self) -> &WDTCONFIG1

0x98 - Configures the hold time of RTC watchdog at level 1

pub fn wdtconfig2(&self) -> &WDTCONFIG2

0x9c - Configures the hold time of RTC watchdog at level 2

pub fn wdtconfig3(&self) -> &WDTCONFIG3

0xa0 - Configures the hold time of RTC watchdog at level 3

pub fn wdtconfig4(&self) -> &WDTCONFIG4

0xa4 - Configures the hold time of RTC watchdog at level 4

pub fn wdtfeed(&self) -> &WDTFEED

0xa8 - RTC watchdog SW feed configuration register

pub fn wdtwprotect(&self) -> &WDTWPROTECT

0xac - RTC watchdog write protection configuration register

pub fn swd_conf(&self) -> &SWD_CONF

0xb0 - Super watchdog configuration register

pub fn swd_wprotect(&self) -> &SWD_WPROTECT

0xb4 - Super watchdog write protection configuration register

pub fn sw_cpu_stall(&self) -> &SW_CPU_STALL

0xb8 - CPU stall configuration register

pub fn store4(&self) -> &STORE4

0xbc - Reservation register 4

pub fn store5(&self) -> &STORE5

0xc0 - Reservation register 5

pub fn store6(&self) -> &STORE6

0xc4 - Reservation register 6

pub fn store7(&self) -> &STORE7

0xc8 - Reservation register 7

pub fn low_power_st(&self) -> &LOW_POWER_ST

0xcc - RTC main state machine status register

pub fn diag0(&self) -> &DIAG0

0xd0 - debug register

pub fn pad_hold(&self) -> &PAD_HOLD

0xd4 - Configures the hold options for RTC GPIOs

pub fn dig_pad_hold(&self) -> &DIG_PAD_HOLD

0xd8 - Configures the hold option for digital GPIOs

pub fn ext_wakeup1(&self) -> &EXT_WAKEUP1

0xdc - EXT1 wakeup configuration register

pub fn ext_wakeup1_status(&self) -> &EXT_WAKEUP1_STATUS

0xe0 - EXT1 wakeup source register

pub fn brown_out(&self) -> &BROWN_OUT

0xe4 - Brownout configuration register

pub fn time_low1(&self) -> &TIME_LOW1

0xe8 - Stores the lower 32 bits of RTC timer 1

pub fn time_high1(&self) -> &TIME_HIGH1

0xec - Stores the higher 16 bits of RTC timer 1

pub fn xtal32k_clk_factor(&self) -> &XTAL32K_CLK_FACTOR

0xf0 - Configures the divider factor for the backup clock of 32 kHz crystal oscillator

pub fn xtal32k_conf(&self) -> &XTAL32K_CONF

0xf4 - 32 kHz crystal oscillator configuration register

pub fn ulp_cp_timer(&self) -> &ULP_CP_TIMER

0xf8 - Configure coprocessor timer

pub fn ulp_cp_ctrl(&self) -> &ULP_CP_CTRL

0xfc - ULP-FSM configuration register

pub fn cocpu_ctrl(&self) -> &COCPU_CTRL

0x100 - ULP-RISCV configuration register

pub fn touch_ctrl1(&self) -> &TOUCH_CTRL1

0x104 - Touch control register

pub fn touch_ctrl2(&self) -> &TOUCH_CTRL2

0x108 - Touch control register

pub fn touch_scan_ctrl(&self) -> &TOUCH_SCAN_CTRL

0x10c - Configure touch scan settings

pub fn touch_slp_thres(&self) -> &TOUCH_SLP_THRES

0x110 - Configure the settings of touch sleep pad

pub fn touch_approach(&self) -> &TOUCH_APPROACH

0x114 - Configure touch approach settings

pub fn touch_filter_ctrl(&self) -> &TOUCH_FILTER_CTRL

0x118 - Configure touch filter settings

pub fn usb_conf(&self) -> &USB_CONF

0x11c - configure usb control register

pub fn touch_timeout_ctrl(&self) -> &TOUCH_TIMEOUT_CTRL

0x120 - Configure touch timeout settings

pub fn slp_reject_cause(&self) -> &SLP_REJECT_CAUSE

0x124 - Stores the reject-to-sleep cause.

pub fn options1(&self) -> &OPTIONS1

0x128 - RTC option register

pub fn slp_wakeup_cause(&self) -> &SLP_WAKEUP_CAUSE

0x12c - Stores the sleep-to-wakeup cause.

pub fn ulp_cp_timer_1(&self) -> &ULP_CP_TIMER_1

0x130 - Configure sleep cycle of the timer

pub fn date(&self) -> &DATE

0x138 -

Trait Implementations

impl Debug for RTC_CNTL

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Deref for RTC_CNTL

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl Send for RTC_CNTL