Module esp32s2::i2s0::conf2

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Expand description

I2S configuration register 2

Structs§

Type Aliases§

  • CAMERA_EN_R
    Field CAMERA_EN reader - Set this bit to enable camera mode.
  • CAMERA_EN_W
    Field CAMERA_EN writer - Set this bit to enable camera mode.
  • CAM_CLK_LOOPBACK_R
    Field CAM_CLK_LOOPBACK reader - Set this bit to loopback PCLK from I2S0I_WS_out.
  • CAM_CLK_LOOPBACK_W
    Field CAM_CLK_LOOPBACK writer - Set this bit to loopback PCLK from I2S0I_WS_out.
  • CAM_SYNC_FIFO_RESET_R
    Field CAM_SYNC_FIFO_RESET reader - Set this bit to reset FIFO in camera mode.
  • CAM_SYNC_FIFO_RESET_W
    Field CAM_SYNC_FIFO_RESET writer - Set this bit to reset FIFO in camera mode.
  • DATA_ENABLE_R
    Field DATA_ENABLE reader - for debug camera mode enable
  • DATA_ENABLE_TEST_EN_R
    Field DATA_ENABLE_TEST_EN reader - for debug camera mode enable
  • DATA_ENABLE_TEST_EN_W
    Field DATA_ENABLE_TEST_EN writer - for debug camera mode enable
  • DATA_ENABLE_W
    Field DATA_ENABLE writer - for debug camera mode enable
  • EXT_ADC_START_EN_R
    Field EXT_ADC_START_EN reader - Set this bit to enable the function that ADC mode is triggered by external signal.
  • EXT_ADC_START_EN_W
    Field EXT_ADC_START_EN writer - Set this bit to enable the function that ADC mode is triggered by external signal.
  • INTER_VALID_EN_R
    Field INTER_VALID_EN reader - Set this bit to enable camera VGA reducing-resolution mode: only receive two consecutive cycle data in four consecutive clocks.
  • INTER_VALID_EN_W
    Field INTER_VALID_EN writer - Set this bit to enable camera VGA reducing-resolution mode: only receive two consecutive cycle data in four consecutive clocks.
  • LCD_EN_R
    Field LCD_EN reader - Set this bit to enable LCD mode.
  • LCD_EN_W
    Field LCD_EN writer - Set this bit to enable LCD mode.
  • LCD_TX_SDX2_EN_R
    Field LCD_TX_SDX2_EN reader - Set this bit to duplicate data pairs (Frame Form 2) in LCD mode.
  • LCD_TX_SDX2_EN_W
    Field LCD_TX_SDX2_EN writer - Set this bit to duplicate data pairs (Frame Form 2) in LCD mode.
  • LCD_TX_WRX2_EN_R
    Field LCD_TX_WRX2_EN reader - LCD WR double for one datum.
  • LCD_TX_WRX2_EN_W
    Field LCD_TX_WRX2_EN writer - LCD WR double for one datum.
  • R
    Register CONF2 reader
  • VSYNC_FILTER_EN_R
    Field VSYNC_FILTER_EN reader - Set this bit to enable I2S VSYNC filter function.
  • VSYNC_FILTER_EN_W
    Field VSYNC_FILTER_EN writer - Set this bit to enable I2S VSYNC filter function.
  • VSYNC_FILTER_THRES_R
    Field VSYNC_FILTER_THRES reader - Configure the I2S VSYNC filter threshold value.
  • VSYNC_FILTER_THRES_W
    Field VSYNC_FILTER_THRES writer - Configure the I2S VSYNC filter threshold value.
  • W
    Register CONF2 writer