Module esp32s2::efuse::rd_repeat_data1
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Register 2 of BLOCK0.
Structs
Field KEY_PURPOSE_0 reader - Purpose of KEY0. Refer to Table Key Purpose Values.
Field KEY_PURPOSE_1 reader - Purpose of KEY1. Refer to Table Key Purpose Values.
Register RD_REPEAT_DATA1 reader
Register 2 of BLOCK0.
Field SECURE_BOOT_KEY_REVOKE0 reader - If set, revokes use of secure boot key digest 0.
Field SECURE_BOOT_KEY_REVOKE1 reader - If set, revokes use of secure boot key digest 1.
Field SECURE_BOOT_KEY_REVOKE2 reader - If set, revokes use of secure boot key digest 2.
Field SPI_BOOT_CRYPT_CNT reader - Enables encryption and decryption, when an SPI boot mode is set. Feature is enabled 1 or 3 bits are set in the eFuse, disabled otherwise.
Field VDD_SPI_DCAP reader - Prevents SPI regulator from overshoot.
Field VDD_SPI_DCURLIM reader - Tunes the current limit threshold of SPI regulator when tieh=0, about 800 mA/(8+d).
Field VDD_SPI_DREFL reader - SPI regulator low voltage reference.
Field VDD_SPI_DREFM reader - SPI regulator medium voltage reference.
Field VDD_SPI_ENCURLIM reader - Set SPI regulator to 1 to enable output current limit.
Field VDD_SPI_EN_INIT reader - Set SPI regulator to 0 to configure init[1:0]
=0.
Field VDD_SPI_FORCE reader - Set this bit to use XPD_VDD_PSI_REG and VDD_SPI_TIEH to configure VDD_SPI LDO.
Field VDD_SPI_INIT reader - Adds resistor from LDO output to ground. 0: no resistance. 1: 6 K. 2: 4 K. 3: 2 K.
Field VDD_SPI_TIEH reader - If VDD_SPI_FORCE is 1, determines VDD_SPI voltage. 0: VDD_SPI connects to 1.8 V LDO. 1: VDD_SPI connects to VDD_RTC_IO.
Field VDD_SPI_XPD reader - If VDD_SPI_FORCE is 1, this value determines if the VDD_SPI regulator is powered on.
Field WDT_DELAY_SEL reader - Selects RTC watchdog timeout threshold at startup. 0: 40,000 slow clock cycles. 1: 80,000 slow clock cycles. 2: 160,000 slow clock cycles. 3: 320,000 slow clock cycles.