Struct esp32s2::UHCI0

pub struct UHCI0 { /* private fields */ }

Universal Host Controller Interface 0

Implementations

impl UHCI0

pub const PTR: *const RegisterBlock = {0x3f414000 as *const uhci0::RegisterBlock}

Pointer to the register block

pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

pub unsafe fn steal() -> Self

Steal an instance of this peripheral

Safety

Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.

Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.

Methods from Deref<Target = RegisterBlock>

pub fn conf0(&self) -> &CONF0

0x00 - UHCI configuration register

pub fn int_raw(&self) -> &INT_RAW

0x04 - Raw interrupt status

pub fn int_st(&self) -> &INT_ST

0x08 - Masked interrupt status

pub fn int_ena(&self) -> &INT_ENA

0x0c - Interrupt enable bits

pub fn int_clr(&self) -> &INT_CLR

0x10 - Interrupt clear bits

pub fn dma_out_status(&self) -> &DMA_OUT_STATUS

0x14 - DMA data-output status register

pub fn dma_out_push(&self) -> &DMA_OUT_PUSH

0x18 - Push control register of TX FIFO

pub fn dma_in_status(&self) -> &DMA_IN_STATUS

0x1c - UHCI data-input status register

pub fn dma_in_pop(&self) -> &DMA_IN_POP

0x20 - Pop control register of RX FIFO

pub fn dma_out_link(&self) -> &DMA_OUT_LINK

0x24 - Link descriptor address and control

pub fn dma_in_link(&self) -> &DMA_IN_LINK

0x28 - Link descriptor address and control

pub fn conf1(&self) -> &CONF1

0x2c - UHCI configuration register

pub fn state0(&self) -> &STATE0

0x30 - UHCI decoder status register

pub fn state1(&self) -> &STATE1

0x34 - UHCI encoder status register

pub fn dma_out_eof_des_addr(&self) -> &DMA_OUT_EOF_DES_ADDR

0x38 - Outlink descriptor address when EOF occurs

pub fn dma_in_suc_eof_des_addr(&self) -> &DMA_IN_SUC_EOF_DES_ADDR

0x3c - Inlink descriptor address when EOF occurs

pub fn dma_in_err_eof_des_addr(&self) -> &DMA_IN_ERR_EOF_DES_ADDR

0x40 - Inlink descriptor address when errors occur

pub fn dma_out_eof_bfr_des_addr(&self) -> &DMA_OUT_EOF_BFR_DES_ADDR

0x44 - Outlink descriptor address before the last transmit descriptor

pub fn ahb_test(&self) -> &AHB_TEST

0x48 - AHB test register

pub fn dma_in_dscr(&self) -> &DMA_IN_DSCR

0x4c - The third word of the next receive descriptor

pub fn dma_in_dscr_bf0(&self) -> &DMA_IN_DSCR_BF0

0x50 - The third word of current receive descriptor

pub fn dma_out_dscr(&self) -> &DMA_OUT_DSCR

0x58 - The third word of the next transmit descriptor

pub fn dma_out_dscr_bf0(&self) -> &DMA_OUT_DSCR_BF0

0x5c - The third word of current transmit descriptor

pub fn escape_conf(&self) -> &ESCAPE_CONF

0x64 - Escape character configuration

pub fn hung_conf(&self) -> &HUNG_CONF

0x68 - Timeout configuration

pub fn rx_head(&self) -> &RX_HEAD

0x70 - UHCI packet header register

pub fn quick_sent(&self) -> &QUICK_SENT

0x74 - UHCI quick_sent configuration register

pub fn q0_word0(&self) -> &Q0_WORD0

0x78 - Q0_WORD0 quick_sent register

pub fn q0_word1(&self) -> &Q0_WORD1

0x7c - Q0_WORD1 quick_sent register

pub fn q1_word0(&self) -> &Q1_WORD0

0x80 - Q1_WORD0 quick_sent register

pub fn q1_word1(&self) -> &Q1_WORD1

0x84 - Q1_WORD1 quick_sent register

pub fn q2_word0(&self) -> &Q2_WORD0

0x88 - Q2_WORD0 quick_sent register

pub fn q2_word1(&self) -> &Q2_WORD1

0x8c - Q2_WORD1 quick_sent register

pub fn q3_word0(&self) -> &Q3_WORD0

0x90 - Q3_WORD0 quick_sent register

pub fn q3_word1(&self) -> &Q3_WORD1

0x94 - Q3_WORD1 quick_sent register

pub fn q4_word0(&self) -> &Q4_WORD0

0x98 - Q4_WORD0 quick_sent register

pub fn q4_word1(&self) -> &Q4_WORD1

0x9c - Q4_WORD1 quick_sent register

pub fn q5_word0(&self) -> &Q5_WORD0

0xa0 - Q5_WORD0 quick_sent register

pub fn q5_word1(&self) -> &Q5_WORD1

0xa4 - Q5_WORD1 quick_sent register

pub fn q6_word0(&self) -> &Q6_WORD0

0xa8 - Q6_WORD0 quick_sent register

pub fn q6_word1(&self) -> &Q6_WORD1

0xac - Q6_WORD1 quick_sent register

pub fn esc_conf0(&self) -> &ESC_CONF0

0xb0 - Escape sequence configuration register 0

pub fn esc_conf1(&self) -> &ESC_CONF1

0xb4 - Escape sequence configuration register 1

pub fn esc_conf2(&self) -> &ESC_CONF2

0xb8 - Escape sequence configuration register 2

pub fn esc_conf3(&self) -> &ESC_CONF3

0xbc - Escape sequence configuration register 3

pub fn pkt_thres(&self) -> &PKT_THRES

0xc0 - Configure register for packet length

pub fn date(&self) -> &DATE

0xfc - UHCI version control register

Trait Implementations

impl Debug for UHCI0

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Deref for UHCI0

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl Send for UHCI0