Struct esp32s2::rtc_cntl::RegisterBlock

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#[repr(C)]
pub struct RegisterBlock { /* private fields */ }
Expand description

Register block

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impl RegisterBlock

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pub const fn options0(&self) -> &OPTIONS0

0x00 - Sets the power options of crystal and PLL clocks, and initiates reset by software

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pub const fn slp_timer0(&self) -> &SLP_TIMER0

0x04 - RTC timer threshold register 0

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pub const fn slp_timer1(&self) -> &SLP_TIMER1

0x08 - RTC timer threshold register 1

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pub const fn time_update(&self) -> &TIME_UPDATE

0x0c - RTC timer update control register

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pub const fn time_low0(&self) -> &TIME_LOW0

0x10 - Stores the lower 32 bits of RTC timer 0.

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pub const fn time_high0(&self) -> &TIME_HIGH0

0x14 - Stores the higher 16 bits of RTC timer 0

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pub const fn state0(&self) -> &STATE0

0x18 - Configures the sleep / reject / wakeup state

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pub const fn timer1(&self) -> &TIMER1

0x1c - Configures CPU stall options

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pub const fn timer2(&self) -> &TIMER2

0x20 - Configures RTC slow clock and touch controller

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pub const fn timer3(&self) -> &TIMER3

0x24 - configure some wait time for power on

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pub const fn timer4(&self) -> &TIMER4

0x28 - configure some wait time for power on

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pub const fn timer5(&self) -> &TIMER5

0x2c - Configures the minimal sleep cycles

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pub const fn timer6(&self) -> &TIMER6

0x30 - Configure minimal sleep cycles register

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pub const fn ana_conf(&self) -> &ANA_CONF

0x34 - Configures the power options for I2C and PLLA

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pub const fn reset_state(&self) -> &RESET_STATE

0x38 - Indicates the CPU reset source. For more information about the reset cause, please refer to Table \ref{table:resetreasons} in Chapter \ref{module:ResetandClock} \textit{ ameref{module:ResetandClock}}.

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pub const fn wakeup_state(&self) -> &WAKEUP_STATE

0x3c - Wakeup bitmap enabling register

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pub const fn int_ena_rtc(&self) -> &INT_ENA_RTC

0x40 - RTC interrupt enabling register

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pub const fn int_raw_rtc(&self) -> &INT_RAW_RTC

0x44 - RTC interrupt raw register

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pub const fn int_st_rtc(&self) -> &INT_ST_RTC

0x48 - RTC interrupt state register

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pub const fn int_clr_rtc(&self) -> &INT_CLR_RTC

0x4c - RTC interrupt clear register

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pub const fn store0(&self) -> &STORE0

0x50 - Reservation register 0

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pub const fn store1(&self) -> &STORE1

0x54 - Reservation register 1

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pub const fn store2(&self) -> &STORE2

0x58 - Reservation register 2

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pub const fn store3(&self) -> &STORE3

0x5c - Reservation register 3

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pub const fn ext_xtl_conf(&self) -> &EXT_XTL_CONF

0x60 - 32 kHz crystal oscillator configuration register

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pub const fn ext_wakeup_conf(&self) -> &EXT_WAKEUP_CONF

0x64 - GPIO wakeup configuration register

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pub const fn slp_reject_conf(&self) -> &SLP_REJECT_CONF

0x68 - Configures sleep / reject options

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pub const fn cpu_period_conf(&self) -> &CPU_PERIOD_CONF

0x6c - CPU sel option

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pub const fn sdio_act_conf(&self) -> &SDIO_ACT_CONF

0x70 - configure sdio active register

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pub const fn clk_conf(&self) -> &CLK_CONF

0x74 - RTC clock configuration register

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pub const fn slow_clk_conf(&self) -> &SLOW_CLK_CONF

0x78 - RTC slow clock configuration register

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pub const fn sdio_conf(&self) -> &SDIO_CONF

0x7c - configure vddsdio register

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pub const fn bias_conf(&self) -> &BIAS_CONF

0x80 - configure power register

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pub const fn reg(&self) -> &REG

0x84 - RTC/DIG regulator configuration register

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pub const fn pwc(&self) -> &PWC

0x88 - RTC power configuraiton register

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pub const fn dig_pwc(&self) -> &DIG_PWC

0x8c - Digital system power configuraiton register

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pub const fn dig_iso(&self) -> &DIG_ISO

0x90 - Digital system ISO configuration register

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pub const fn wdtconfig0(&self) -> &WDTCONFIG0

0x94 - RTC watchdog configuration register

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pub const fn wdtconfig1(&self) -> &WDTCONFIG1

0x98 - Configures the hold time of RTC watchdog at level 1

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pub const fn wdtconfig2(&self) -> &WDTCONFIG2

0x9c - Configures the hold time of RTC watchdog at level 2

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pub const fn wdtconfig3(&self) -> &WDTCONFIG3

0xa0 - Configures the hold time of RTC watchdog at level 3

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pub const fn wdtconfig4(&self) -> &WDTCONFIG4

0xa4 - Configures the hold time of RTC watchdog at level 4

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pub const fn wdtfeed(&self) -> &WDTFEED

0xa8 - RTC watchdog SW feed configuration register

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pub const fn wdtwprotect(&self) -> &WDTWPROTECT

0xac - RTC watchdog write protection configuration register

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pub const fn swd_conf(&self) -> &SWD_CONF

0xb0 - Super watchdog configuration register

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pub const fn swd_wprotect(&self) -> &SWD_WPROTECT

0xb4 - Super watchdog write protection configuration register

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pub const fn sw_cpu_stall(&self) -> &SW_CPU_STALL

0xb8 - CPU stall configuration register

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pub const fn store4(&self) -> &STORE4

0xbc - Reservation register 4

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pub const fn store5(&self) -> &STORE5

0xc0 - Reservation register 5

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pub const fn store6(&self) -> &STORE6

0xc4 - Reservation register 6

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pub const fn store7(&self) -> &STORE7

0xc8 - Reservation register 7

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pub const fn low_power_st(&self) -> &LOW_POWER_ST

0xcc - RTC main state machine status register

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pub const fn diag0(&self) -> &DIAG0

0xd0 - debug register

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pub const fn pad_hold(&self) -> &PAD_HOLD

0xd4 - Configures the hold options for RTC GPIOs

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pub const fn dig_pad_hold(&self) -> &DIG_PAD_HOLD

0xd8 - Configures the hold option for digital GPIOs

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pub const fn ext_wakeup1(&self) -> &EXT_WAKEUP1

0xdc - EXT1 wakeup configuration register

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pub const fn ext_wakeup1_status(&self) -> &EXT_WAKEUP1_STATUS

0xe0 - EXT1 wakeup source register

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pub const fn brown_out(&self) -> &BROWN_OUT

0xe4 - Brownout configuration register

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pub const fn time_low1(&self) -> &TIME_LOW1

0xe8 - Stores the lower 32 bits of RTC timer 1

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pub const fn time_high1(&self) -> &TIME_HIGH1

0xec - Stores the higher 16 bits of RTC timer 1

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pub const fn xtal32k_clk_factor(&self) -> &XTAL32K_CLK_FACTOR

0xf0 - Configures the divider factor for the backup clock of 32 kHz crystal oscillator

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pub const fn xtal32k_conf(&self) -> &XTAL32K_CONF

0xf4 - 32 kHz crystal oscillator configuration register

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pub const fn ulp_cp_timer(&self) -> &ULP_CP_TIMER

0xf8 - Configure coprocessor timer

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pub const fn ulp_cp_ctrl(&self) -> &ULP_CP_CTRL

0xfc - ULP-FSM configuration register

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pub const fn cocpu_ctrl(&self) -> &COCPU_CTRL

0x100 - ULP-RISCV configuration register

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pub const fn touch_ctrl1(&self) -> &TOUCH_CTRL1

0x104 - Touch control register

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pub const fn touch_ctrl2(&self) -> &TOUCH_CTRL2

0x108 - Touch control register

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pub const fn touch_scan_ctrl(&self) -> &TOUCH_SCAN_CTRL

0x10c - Configure touch scan settings

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pub const fn touch_slp_thres(&self) -> &TOUCH_SLP_THRES

0x110 - Configure the settings of touch sleep pad

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pub const fn touch_approach(&self) -> &TOUCH_APPROACH

0x114 - Configure touch approach settings

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pub const fn touch_filter_ctrl(&self) -> &TOUCH_FILTER_CTRL

0x118 - Configure touch filter settings

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pub const fn usb_conf(&self) -> &USB_CONF

0x11c - configure usb control register

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pub const fn touch_timeout_ctrl(&self) -> &TOUCH_TIMEOUT_CTRL

0x120 - Configure touch timeout settings

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pub const fn slp_reject_cause(&self) -> &SLP_REJECT_CAUSE

0x124 - Stores the reject-to-sleep cause.

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pub const fn options1(&self) -> &OPTIONS1

0x128 - RTC option register

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pub const fn slp_wakeup_cause(&self) -> &SLP_WAKEUP_CAUSE

0x12c - Stores the sleep-to-wakeup cause.

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pub const fn ulp_cp_timer_1(&self) -> &ULP_CP_TIMER_1

0x130 - Configure sleep cycle of the timer

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pub const fn date(&self) -> &DATE

0x138 -

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