Type Alias esp32s2::extmem::pro_icache_ctrl::W

pub type W = W<PRO_ICACHE_CTRL_SPEC>;

Register PRO_ICACHE_CTRL writer

Implementations

impl W

pub fn pro_icache_enable( &mut self ) -> PRO_ICACHE_ENABLE_W<'_, PRO_ICACHE_CTRL_SPEC, 0>

Bit 0 - The bit is used to activate the data cache. 0: disable, 1: enable

pub fn pro_icache_setsize_mode( &mut self ) -> PRO_ICACHE_SETSIZE_MODE_W<'_, PRO_ICACHE_CTRL_SPEC, 2>

Bit 2 - The bit is used to configure cache memory size.0: 8KB, 1: 16KB

pub fn pro_icache_blocksize_mode( &mut self ) -> PRO_ICACHE_BLOCKSIZE_MODE_W<'_, PRO_ICACHE_CTRL_SPEC, 3>

Bit 3 - The bit is used to configure cache block size.0: 16 bytes, 1: 32 bytes

pub fn pro_icache_invalidate_ena( &mut self ) -> PRO_ICACHE_INVALIDATE_ENA_W<'_, PRO_ICACHE_CTRL_SPEC, 8>

Bit 8 - The bit is used to enable invalidate operation. It will be cleared by hardware after invalidate operation done.

pub fn pro_icache_lock0_en( &mut self ) -> PRO_ICACHE_LOCK0_EN_W<'_, PRO_ICACHE_CTRL_SPEC, 14>

Bit 14 - The bit is used to enable pre-lock operation which is combined with PRO_ICACHE_LOCK0_ADDR_REG and PRO_ICACHE_LOCK0_SIZE_REG.

pub fn pro_icache_lock1_en( &mut self ) -> PRO_ICACHE_LOCK1_EN_W<'_, PRO_ICACHE_CTRL_SPEC, 15>

Bit 15 - The bit is used to enable pre-lock operation which is combined with PRO_ICACHE_LOCK1_ADDR_REG and PRO_ICACHE_LOCK1_SIZE_REG.

pub fn pro_icache_autoload_ena( &mut self ) -> PRO_ICACHE_AUTOLOAD_ENA_W<'_, PRO_ICACHE_CTRL_SPEC, 18>

Bit 18 - The bit is used to enable and disable conditional-preload operation. It is combined with pre_dcache_autoload_done. 1: enable, 0: disable.

pub fn pro_icache_preload_ena( &mut self ) -> PRO_ICACHE_PRELOAD_ENA_W<'_, PRO_ICACHE_CTRL_SPEC, 20>

Bit 20 - The bit is used to enable preload operation. It will be cleared by hardware after preload operation done.

pub fn pro_icache_unlock_ena( &mut self ) -> PRO_ICACHE_UNLOCK_ENA_W<'_, PRO_ICACHE_CTRL_SPEC, 22>

Bit 22 - The bit is used to enable unlock operation. It will be cleared by hardware after unlock operation done.

pub fn pro_icache_lock_ena( &mut self ) -> PRO_ICACHE_LOCK_ENA_W<'_, PRO_ICACHE_CTRL_SPEC, 24>

Bit 24 - The bit is used to enable lock operation. It will be cleared by hardware after lock operation done.

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.