Enum esp32s2::Interrupt

source ·
#[repr(u16)]
pub enum Interrupt {
Show 88 variants WIFI_MAC, WIFI_NMI, WIFI_PWR, WIFI_BB, BT_MAC, BT_BB, BT_BB_NMI, RWBT, RWBLE, RWBT_NMI, RWBLE_NMI, SLC0, SLC1, UHCI0, UHCI1, TG0_T0_LEVEL, TG0_T1_LEVEL, TG0_WDT_LEVEL, TG0_LACT_LEVEL, TG1_T0_LEVEL, TG1_T1_LEVEL, TG1_WDT_LEVEL, TG1_LACT_LEVEL, GPIO, GPIO_NMI, GPIO_INTR_2, GPIO_NMI_2, DEDICATED_GPIO, FROM_CPU_INTR0, FROM_CPU_INTR1, FROM_CPU_INTR2, FROM_CPU_INTR3, SPI1, SPI2, SPI3, I2S0, I2S1, UART0, UART1, UART2, SDIO_HOST, LEDC, EFUSE, TWAI0, USB, RTC_CORE, RMT, PCNT, I2C_EXT0, I2C_EXT1, RSA, SHA, AES, SPI2_DMA, SPI3_DMA, WDT, TIMER1, TIMER2, TG0_T0_EDGE, TG0_T1_EDGE, TG0_WDT_EDGE, TG0_LACT_EDGE, TG1_T0_EDGE, TG1_T1_EDGE, TG1_WDT_EDGE, TG1_LACT_EDGE, CACHE_IA, SYSTIMER_TARGET0, SYSTIMER_TARGET1, SYSTIMER_TARGET2, PMS_PRO_IRAM0_ILG, PMS_PRO_DRAM0_ILG, PMS_PRO_DPORT_ILG, PMS_PRO_AHB_ILG, PMS_PRO_CACHE_ILG, PMS_DMA_APB_I_ILG, PMS_DMA_RX_I_ILG, PMS_DMA_TX_I_ILG, SPI0_REJECT_CACHE, SPI4_DMA, SPI4, ICACHE_PRELOAD, DCACHE_PRELOAD, APB_ADC, CPU_PERI_ERR, APB_PERI_ERR, DCACHE_SYNC, ICACHE_SYNC,
}
Expand description

Enumeration of all the interrupts.

Variants§

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WIFI_MAC

0 - WIFI_MAC

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WIFI_NMI

1 - WIFI_NMI

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WIFI_PWR

2 - WIFI_PWR

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WIFI_BB

3 - WIFI_BB

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BT_MAC

4 - BT_MAC

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BT_BB

5 - BT_BB

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BT_BB_NMI

6 - BT_BB_NMI

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RWBT

7 - RWBT

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RWBLE

8 - RWBLE

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RWBT_NMI

9 - RWBT_NMI

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RWBLE_NMI

10 - RWBLE_NMI

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SLC0

11 - SLC0

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SLC1

12 - SLC1

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UHCI0

13 - UHCI0

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UHCI1

14 - UHCI1

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TG0_T0_LEVEL

15 - TG0_T0_LEVEL

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TG0_T1_LEVEL

16 - TG0_T1_LEVEL

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TG0_WDT_LEVEL

17 - TG0_WDT_LEVEL

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TG0_LACT_LEVEL

18 - TG0_LACT_LEVEL

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TG1_T0_LEVEL

19 - TG1_T0_LEVEL

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TG1_T1_LEVEL

20 - TG1_T1_LEVEL

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TG1_WDT_LEVEL

21 - TG1_WDT_LEVEL

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TG1_LACT_LEVEL

22 - TG1_LACT_LEVEL

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GPIO

23 - GPIO

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GPIO_NMI

24 - GPIO_NMI

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GPIO_INTR_2

25 - GPIO_INTR_2

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GPIO_NMI_2

26 - GPIO_NMI_2

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DEDICATED_GPIO

27 - DEDICATED_GPIO

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FROM_CPU_INTR0

28 - FROM_CPU_INTR0

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FROM_CPU_INTR1

29 - FROM_CPU_INTR1

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FROM_CPU_INTR2

30 - FROM_CPU_INTR2

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FROM_CPU_INTR3

31 - FROM_CPU_INTR3

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SPI1

32 - SPI1

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SPI2

33 - SPI2

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SPI3

34 - SPI3

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I2S0

35 - I2S0

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I2S1

36 - I2S1

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UART0

37 - UART0

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UART1

38 - UART1

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UART2

39 - UART2

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SDIO_HOST

40 - SDIO_HOST

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LEDC

45 - LEDC

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EFUSE

46 - EFUSE

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TWAI0

47 - TWAI0

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USB

48 - USB

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RTC_CORE

49 - RTC_CORE

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RMT

50 - RMT

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PCNT

51 - PCNT

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I2C_EXT0

52 - I2C_EXT0

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I2C_EXT1

53 - I2C_EXT1

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RSA

54 - RSA

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SHA

55 - SHA

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AES

56 - AES

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SPI2_DMA

57 - SPI2_DMA

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SPI3_DMA

58 - SPI3_DMA

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WDT

59 - WDT

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TIMER1

60 - TIMER1

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TIMER2

61 - TIMER2

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TG0_T0_EDGE

62 - TG0_T0_EDGE

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TG0_T1_EDGE

63 - TG0_T1_EDGE

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TG0_WDT_EDGE

64 - TG0_WDT_EDGE

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TG0_LACT_EDGE

65 - TG0_LACT_EDGE

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TG1_T0_EDGE

66 - TG1_T0_EDGE

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TG1_T1_EDGE

67 - TG1_T1_EDGE

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TG1_WDT_EDGE

68 - TG1_WDT_EDGE

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TG1_LACT_EDGE

69 - TG1_LACT_EDGE

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CACHE_IA

70 - CACHE_IA

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SYSTIMER_TARGET0

71 - SYSTIMER_TARGET0

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SYSTIMER_TARGET1

72 - SYSTIMER_TARGET1

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SYSTIMER_TARGET2

73 - SYSTIMER_TARGET2

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PMS_PRO_IRAM0_ILG

75 - PMS_PRO_IRAM0_ILG

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PMS_PRO_DRAM0_ILG

76 - PMS_PRO_DRAM0_ILG

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PMS_PRO_DPORT_ILG

77 - PMS_PRO_DPORT_ILG

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PMS_PRO_AHB_ILG

78 - PMS_PRO_AHB_ILG

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PMS_PRO_CACHE_ILG

79 - PMS_PRO_CACHE_ILG

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PMS_DMA_APB_I_ILG

80 - PMS_DMA_APB_I_ILG

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PMS_DMA_RX_I_ILG

81 - PMS_DMA_RX_I_ILG

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PMS_DMA_TX_I_ILG

82 - PMS_DMA_TX_I_ILG

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SPI0_REJECT_CACHE

83 - SPI0_REJECT_CACHE

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SPI4_DMA

85 - SPI4_DMA

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SPI4

86 - SPI4

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ICACHE_PRELOAD

87 - ICACHE_PRELOAD

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DCACHE_PRELOAD

88 - DCACHE_PRELOAD

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APB_ADC

89 - APB_ADC

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CPU_PERI_ERR

91 - CPU_PERI_ERR

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APB_PERI_ERR

92 - APB_PERI_ERR

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DCACHE_SYNC

93 - DCACHE_SYNC

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ICACHE_SYNC

94 - ICACHE_SYNC

Implementations§

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impl Interrupt

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pub fn try_from(value: u16) -> Result<Self, TryFromInterruptError>

Attempt to convert a given value into an Interrupt

Trait Implementations§

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impl Clone for Interrupt

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fn clone(&self) -> Interrupt

Returns a copy of the value. Read more
1.0.0 · source§

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source. Read more
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impl Debug for Interrupt

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fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter. Read more
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impl InterruptNumber for Interrupt

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fn number(self) -> u16

Return the interrupt number associated with this variant. Read more
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impl PartialEq<Interrupt> for Interrupt

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fn eq(&self, other: &Interrupt) -> bool

This method tests for self and other values to be equal, and is used by ==.
1.0.0 · source§

fn ne(&self, other: &Rhs) -> bool

This method tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.
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impl Copy for Interrupt

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impl Eq for Interrupt

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impl StructuralEq for Interrupt

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impl StructuralPartialEq for Interrupt

Auto Trait Implementations§

Blanket Implementations§

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impl<T> Any for Twhere T: 'static + ?Sized,

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fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
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impl<T> Borrow<T> for Twhere T: ?Sized,

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fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
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impl<T> BorrowMut<T> for Twhere T: ?Sized,

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fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
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impl<T> From<T> for T

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fn from(t: T) -> T

Returns the argument unchanged.

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impl<T, U> Into<U> for Twhere U: From<T>,

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fn into(self) -> U

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

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impl<T, U> TryFrom<U> for Twhere U: Into<T>,

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type Error = Infallible

The type returned in the event of a conversion error.
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fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.
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impl<T, U> TryInto<U> for Twhere U: TryFrom<T>,

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type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.
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fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Performs the conversion.