Struct esp32s2::uhci0::int_ena::W

pub struct W(_);

Register INT_ENA writer

Implementations

impl W

pub fn rx_start_int_ena(&mut self) -> RX_START_INT_ENA_W<'_, 0>

Bit 0 - This is the interrupt enable bit for UHCI_RX_START_INT interrupt.

pub fn tx_start_int_ena(&mut self) -> TX_START_INT_ENA_W<'_, 1>

Bit 1 - This is the interrupt enable bit for UHCI_TX_START_INT interrupt.

pub fn rx_hung_int_ena(&mut self) -> RX_HUNG_INT_ENA_W<'_, 2>

Bit 2 - This is the interrupt enable bit for UHCI_RX_HUNG_INT interrupt.

pub fn tx_hung_int_ena(&mut self) -> TX_HUNG_INT_ENA_W<'_, 3>

Bit 3 - This is the interrupt enable bit for UHCI_TX_HUNG_INT interrupt.

pub fn in_done_int_ena(&mut self) -> IN_DONE_INT_ENA_W<'_, 4>

Bit 4 - This is the interrupt enable bit for UHCI_IN_DONE_INT interrupt.

pub fn in_suc_eof_int_ena(&mut self) -> IN_SUC_EOF_INT_ENA_W<'_, 5>

Bit 5 - This is the interrupt enable bit for UHCI_IN_SUC_EOF_INT interrupt.

pub fn in_err_eof_int_ena(&mut self) -> IN_ERR_EOF_INT_ENA_W<'_, 6>

Bit 6 - This is the interrupt enable bit for UHCI_IN_ERR_EOF_INT interrupt.

pub fn out_done_int_ena(&mut self) -> OUT_DONE_INT_ENA_W<'_, 7>

Bit 7 - This is the interrupt enable bit for UHCI_OUT_DONE_INT interrupt.

pub fn out_eof_int_ena(&mut self) -> OUT_EOF_INT_ENA_W<'_, 8>

Bit 8 - This is the interrupt enable bit for UHCI_OUT_EOF_INT interrupt.

pub fn in_dscr_err_int_ena(&mut self) -> IN_DSCR_ERR_INT_ENA_W<'_, 9>

Bit 9 - This is the interrupt enable bit for UHCI_IN_DSCR_ERR_INT interrupt.

pub fn out_dscr_err_int_ena(&mut self) -> OUT_DSCR_ERR_INT_ENA_W<'_, 10>

Bit 10 - This is the interrupt enable bit for UHCI_OUT_DSCR_ERR_INT interrupt.

pub fn in_dscr_empty_int_ena(&mut self) -> IN_DSCR_EMPTY_INT_ENA_W<'_, 11>

Bit 11 - This is the interrupt enable bit for UHCI_IN_DSCR_EMPTY_INT interrupt.

pub fn outlink_eof_err_int_ena(&mut self) -> OUTLINK_EOF_ERR_INT_ENA_W<'_, 12>

Bit 12 - This is the interrupt enable bit for UHCI_OUTLINK_EOF_ERR_INT interrupt.

pub fn out_total_eof_int_ena(&mut self) -> OUT_TOTAL_EOF_INT_ENA_W<'_, 13>

Bit 13 - This is the interrupt enable bit for UHCI_OUT_TOTAL_EOF_INT interrupt.

pub fn send_s_reg_q_int_ena(&mut self) -> SEND_S_REG_Q_INT_ENA_W<'_, 14>

Bit 14 - This is the interrupt enable bit for UHCI_SEND_S_REG_Q_INT interrupt.

pub fn send_a_reg_q_int_ena(&mut self) -> SEND_A_REG_Q_INT_ENA_W<'_, 15>

Bit 15 - This is the interrupt enable bit for UHCI_SEND_A_REG_Q_INT interrupt.

pub fn dma_infifo_full_wm_int_ena( &mut self ) -> DMA_INFIFO_FULL_WM_INT_ENA_W<'_, 16>

Bit 16 - This is the interrupt enable bit for UHCI_DMA_INFIFO_FULL_WM_INT interrupt.

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Methods from Deref<Target = W<INT_ENA_SPEC>>

pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self

Writes raw bits to the register.

Safety

Read datasheet or reference manual to find what values are allowed to pass.

Trait Implementations

impl Deref for W

type Target = W<INT_ENA_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut Self::Target

Mutably dereferences the value.

impl From<W<INT_ENA_SPEC>> for W

fn from(writer: W<INT_ENA_SPEC>) -> Self

Converts to this type from the input type.