Struct esp32s2::rmt::chconf1::R

pub struct R(_);

Register CH%sCONF1 reader

Implementations

impl R

pub fn tx_start(&self) -> TX_START_R

Bit 0 - Set this bit to start sending data on CHANNEL%s.

pub fn rx_en(&self) -> RX_EN_R

Bit 1 - Set this bit to enable receiver to receive data on CHANNEL%s.

pub fn mem_owner(&self) -> MEM_OWNER_R

Bit 5 - This register marks the ownership of CHANNEL%s’s ram block. 1’h1: Receiver is using the ram. 1’h0: Transmitter is using the ram.

pub fn tx_conti_mode(&self) -> TX_CONTI_MODE_R

Bit 6 - Set this bit to restart transmission from the first data to the last data in CHANNEL%s.

pub fn rx_filter_en(&self) -> RX_FILTER_EN_R

Bit 7 - This is the receive filter’s enable bit for CHANNEL%s.

pub fn rx_filter_thres(&self) -> RX_FILTER_THRES_R

Bits 8:15 - Ignores the input pulse when its width is smaller than this register value in APB clock periods (in receive mode).

pub fn chk_rx_carrier_en(&self) -> CHK_RX_CARRIER_EN_R

Bit 16 - Set this bit to enable memory loop read mode when carrier modulation is enabled for channel %s.

pub fn ref_always_on(&self) -> REF_ALWAYS_ON_R

Bit 17 - This bit is used to select the base clock for CHANNEL%s. 1’h1: clk_apb 1’h0:clk_ref

pub fn idle_out_lv(&self) -> IDLE_OUT_LV_R

Bit 18 - This bit configures the level of output signal in CHANNEL%s when the latter is in IDLE state.

pub fn idle_out_en(&self) -> IDLE_OUT_EN_R

Bit 19 - This is the output enable-control bit for CHANNEL%s in IDLE state.

pub fn tx_stop(&self) -> TX_STOP_R

Bit 20 - Set this bit to stop the transmitter of CHANNEL%s sending data out.

Methods from Deref<Target = R<CHCONF1_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<CHCONF1_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<CHCONF1_SPEC>> for R

fn from(reader: R<CHCONF1_SPEC>) -> Self

Converts to this type from the input type.