Struct esp32s2::apb_saradc::ctrl::W
source · pub struct W(_);
Expand description
Register CTRL
writer
Implementations§
source§impl W
impl W
sourcepub fn start_force(&mut self) -> START_FORCE_W<'_, 0>
pub fn start_force(&mut self) -> START_FORCE_W<'_, 0>
Bit 0 - 0: select FSM to start SAR ADC. 1: select software to start SAR ADC.
sourcepub fn work_mode(&mut self) -> WORK_MODE_W<'_, 3>
pub fn work_mode(&mut self) -> WORK_MODE_W<'_, 3>
Bits 3:4 - 0: single-channel scan mode. 1: double-channel scan mode. 2: alternate-channel scan mode.
sourcepub fn sar_sel(&mut self) -> SAR_SEL_W<'_, 5>
pub fn sar_sel(&mut self) -> SAR_SEL_W<'_, 5>
Bit 5 - 0: select SAR ADC1. 1: select SAR ADC2, only work for single-channel scan mode.
sourcepub fn sar_clk_gated(&mut self) -> SAR_CLK_GATED_W<'_, 6>
pub fn sar_clk_gated(&mut self) -> SAR_CLK_GATED_W<'_, 6>
Bit 6 - SAR clock gate enable bit.
sourcepub fn sar_clk_div(&mut self) -> SAR_CLK_DIV_W<'_, 7>
pub fn sar_clk_div(&mut self) -> SAR_CLK_DIV_W<'_, 7>
Bits 7:14 - SAR clock divider
sourcepub fn sar1_patt_len(&mut self) -> SAR1_PATT_LEN_W<'_, 15>
pub fn sar1_patt_len(&mut self) -> SAR1_PATT_LEN_W<'_, 15>
Bits 15:18 - 0 ~ 15 means length 1 ~ 16
sourcepub fn sar2_patt_len(&mut self) -> SAR2_PATT_LEN_W<'_, 19>
pub fn sar2_patt_len(&mut self) -> SAR2_PATT_LEN_W<'_, 19>
Bits 19:22 - 0 ~ 15 means length 1 ~ 16
sourcepub fn sar1_patt_p_clear(&mut self) -> SAR1_PATT_P_CLEAR_W<'_, 23>
pub fn sar1_patt_p_clear(&mut self) -> SAR1_PATT_P_CLEAR_W<'_, 23>
Bit 23 - Clear the pointer of pattern table for DIG ADC1 CTRL.
sourcepub fn sar2_patt_p_clear(&mut self) -> SAR2_PATT_P_CLEAR_W<'_, 24>
pub fn sar2_patt_p_clear(&mut self) -> SAR2_PATT_P_CLEAR_W<'_, 24>
Bit 24 - Clear the pointer of pattern table for DIG ADC2 CTRL.
sourcepub fn data_sar_sel(&mut self) -> DATA_SAR_SEL_W<'_, 25>
pub fn data_sar_sel(&mut self) -> DATA_SAR_SEL_W<'_, 25>
Bit 25 - 1: sar_sel will be coded to the MSB of the 16-bit output data, in this case the resolution should not be larger than 11 bits.
sourcepub fn data_to_i2s(&mut self) -> DATA_TO_I2S_W<'_, 26>
pub fn data_to_i2s(&mut self) -> DATA_TO_I2S_W<'_, 26>
Bit 26 - 1: I2S input data is from SAR ADC (for DMA), 0: I2S input data is from GPIO matrix
sourcepub fn xpd_sar_force(&mut self) -> XPD_SAR_FORCE_W<'_, 27>
pub fn xpd_sar_force(&mut self) -> XPD_SAR_FORCE_W<'_, 27>
Bits 27:28 - Force option to xpd sar blocks.
sourcepub fn wait_arb_cycle(&mut self) -> WAIT_ARB_CYCLE_W<'_, 30>
pub fn wait_arb_cycle(&mut self) -> WAIT_ARB_CYCLE_W<'_, 30>
Bits 30:31 - Wait arbit signal stable after sar_done.