Struct esp32s2::gpio::pin::W

pub struct W(_);

Register PIN%s writer

Implementations

impl W

pub fn sync2_bypass(&mut self) -> SYNC2_BYPASS_W<'_, 0>

Bits 0:1 - For the second stage synchronization, GPIO input data can be syn- chronized on either edge of the APB clock. 0: no synchronization; 1: synchronized on falling edge; 2 and 3: synchronized on rising edge.

pub fn pad_driver(&mut self) -> PAD_DRIVER_W<'_, 2>

Bit 2 - Pad driver selection. 0: normal output; 1: open drain output..

pub fn sync1_bypass(&mut self) -> SYNC1_BYPASS_W<'_, 3>

Bits 3:4 - For the first stage synchronization, GPIO input data can be synchro- nized on either edge of the APB clock. 0: no synchronization; 1: synchronized on falling edge; 2 and 3: synchronized on rising edge.

pub fn int_type(&mut self) -> INT_TYPE_W<'_, 7>

Bits 7:9 - Interrupt type selection. 0: GPIO interrupt disabled; 1: rising edge trigger; 2: falling edge trigger; 3: any edge trigger; 4: low level trigger; 5: high level trigger. (R/W)

pub fn wakeup_enable(&mut self) -> WAKEUP_ENABLE_W<'_, 10>

Bit 10 - GPIO wake-up enable bit, only wakes up the CPU from Light-sleep.

pub fn config(&mut self) -> CONFIG_W<'_, 11>

Bits 11:12 - Reserved

pub fn int_ena(&mut self) -> INT_ENA_W<'_, 13>

Bits 13:17 - Interrupt enable bits. bit13: CPU interrupt enabled; bit14: CPU non-maskable interrupt enabled.

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Methods from Deref<Target = W<PIN_SPEC>>

pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self

Writes raw bits to the register.

Safety

Read datasheet or reference manual to find what values are allowed to pass.

Trait Implementations

impl Deref for W

type Target = W<PIN_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut Self::Target

Mutably dereferences the value.

impl From<W<PIN_SPEC>> for W

fn from(writer: W<PIN_SPEC>) -> Self

Converts to this type from the input type.