Struct esp32s2::sens::sar_dac_ctrl1::W
source · pub struct W(_);
Expand description
Register SAR_DAC_CTRL1
writer
Implementations§
source§impl W
impl W
sourcepub fn sw_fstep(&mut self) -> SW_FSTEP_W<'_, 0>
pub fn sw_fstep(&mut self) -> SW_FSTEP_W<'_, 0>
Bits 0:15 - Frequency step for CW generator can be used to adjust the frequency.
sourcepub fn sw_tone_en(&mut self) -> SW_TONE_EN_W<'_, 16>
pub fn sw_tone_en(&mut self) -> SW_TONE_EN_W<'_, 16>
Bit 16 - 0: disable CW generator. 1: enable CW generator.
sourcepub fn debug_bit_sel(&mut self) -> DEBUG_BIT_SEL_W<'_, 17>
pub fn debug_bit_sel(&mut self) -> DEBUG_BIT_SEL_W<'_, 17>
Bits 17:21
sourcepub fn dac_dig_force(&mut self) -> DAC_DIG_FORCE_W<'_, 22>
pub fn dac_dig_force(&mut self) -> DAC_DIG_FORCE_W<'_, 22>
Bit 22 - 0: DAC1 and DAC2 do not use DMA. 1: DAC1 and DAC2 use DMA.
sourcepub fn dac_clk_force_low(&mut self) -> DAC_CLK_FORCE_LOW_W<'_, 23>
pub fn dac_clk_force_low(&mut self) -> DAC_CLK_FORCE_LOW_W<'_, 23>
Bit 23 - 1: force PDAC_CLK to low
sourcepub fn dac_clk_force_high(&mut self) -> DAC_CLK_FORCE_HIGH_W<'_, 24>
pub fn dac_clk_force_high(&mut self) -> DAC_CLK_FORCE_HIGH_W<'_, 24>
Bit 24 - 1: force PDAC_CLK to high
sourcepub fn dac_clk_inv(&mut self) -> DAC_CLK_INV_W<'_, 25>
pub fn dac_clk_inv(&mut self) -> DAC_CLK_INV_W<'_, 25>
Bit 25 - 1: invert PDAC_CLK.
sourcepub fn dac_reset(&mut self) -> DAC_RESET_W<'_, 26>
pub fn dac_reset(&mut self) -> DAC_RESET_W<'_, 26>
Bit 26 - Reset DAC by software.
sourcepub fn dac_clkgate_en(&mut self) -> DAC_CLKGATE_EN_W<'_, 27>
pub fn dac_clkgate_en(&mut self) -> DAC_CLKGATE_EN_W<'_, 27>
Bit 27 - DAC clock gate enable bit.