pub struct R(_);Expand description
Register CONF2 reader
Implementations§
source§impl R
impl R
sourcepub fn camera_en(&self) -> CAMERA_EN_R
pub fn camera_en(&self) -> CAMERA_EN_R
Bit 0 - Set this bit to enable camera mode.
sourcepub fn lcd_tx_wrx2_en(&self) -> LCD_TX_WRX2_EN_R
pub fn lcd_tx_wrx2_en(&self) -> LCD_TX_WRX2_EN_R
Bit 1 - LCD WR double for one datum.
sourcepub fn lcd_tx_sdx2_en(&self) -> LCD_TX_SDX2_EN_R
pub fn lcd_tx_sdx2_en(&self) -> LCD_TX_SDX2_EN_R
Bit 2 - Set this bit to duplicate data pairs (Frame Form 2) in LCD mode.
sourcepub fn data_enable_test_en(&self) -> DATA_ENABLE_TEST_EN_R
pub fn data_enable_test_en(&self) -> DATA_ENABLE_TEST_EN_R
Bit 3 - for debug camera mode enable
sourcepub fn data_enable(&self) -> DATA_ENABLE_R
pub fn data_enable(&self) -> DATA_ENABLE_R
Bit 4 - for debug camera mode enable
sourcepub fn ext_adc_start_en(&self) -> EXT_ADC_START_EN_R
pub fn ext_adc_start_en(&self) -> EXT_ADC_START_EN_R
Bit 6 - Set this bit to enable the function that ADC mode is triggered by external signal.
sourcepub fn inter_valid_en(&self) -> INTER_VALID_EN_R
pub fn inter_valid_en(&self) -> INTER_VALID_EN_R
Bit 7 - Set this bit to enable camera VGA reducing-resolution mode: only receive two consecutive cycle data in four consecutive clocks.
sourcepub fn cam_sync_fifo_reset(&self) -> CAM_SYNC_FIFO_RESET_R
pub fn cam_sync_fifo_reset(&self) -> CAM_SYNC_FIFO_RESET_R
Bit 8 - Set this bit to reset FIFO in camera mode.
sourcepub fn cam_clk_loopback(&self) -> CAM_CLK_LOOPBACK_R
pub fn cam_clk_loopback(&self) -> CAM_CLK_LOOPBACK_R
Bit 9 - Set this bit to loopback PCLK from I2S0I_WS_out.
sourcepub fn vsync_filter_en(&self) -> VSYNC_FILTER_EN_R
pub fn vsync_filter_en(&self) -> VSYNC_FILTER_EN_R
Bit 10 - Set this bit to enable I2S VSYNC filter function.
sourcepub fn vsync_filter_thres(&self) -> VSYNC_FILTER_THRES_R
pub fn vsync_filter_thres(&self) -> VSYNC_FILTER_THRES_R
Bits 11:13 - Configure the I2S VSYNC filter threshold value.