Module sens

Source
Expand description

SENS Peripheral

Modules§

sar_cocpu_int_clr
Interrupt clear bit of ULP-RISCV
sar_cocpu_int_ena
Interrupt enable bit of ULP-RISCV
sar_cocpu_int_raw
Interrupt raw bit of ULP-RISCV
sar_cocpu_int_st
Interrupt status bit of ULP-RISCV
sar_i2c_ctrl
Configure RTC I2C transmission
sar_slave_addr1
Configure slave addresses 0-1 of RTC I2C
sar_slave_addr2
Configure slave addresses 2-3 of RTC I2C
sar_slave_addr3
Configure slave addresses 4-5 of RTC I2C
sar_slave_addr4
Configure slave addresses 6-7 of RTC I2C

Structs§

RegisterBlock
Register block

Type Aliases§

SAR_COCPU_INT_CLR
SAR_COCPU_INT_CLR (w) register accessor: Interrupt clear bit of ULP-RISCV
SAR_COCPU_INT_ENA
SAR_COCPU_INT_ENA (rw) register accessor: Interrupt enable bit of ULP-RISCV
SAR_COCPU_INT_RAW
SAR_COCPU_INT_RAW (r) register accessor: Interrupt raw bit of ULP-RISCV
SAR_COCPU_INT_ST
SAR_COCPU_INT_ST (r) register accessor: Interrupt status bit of ULP-RISCV
SAR_I2C_CTRL
SAR_I2C_CTRL (rw) register accessor: Configure RTC I2C transmission
SAR_SLAVE_ADDR1
SAR_SLAVE_ADDR1 (rw) register accessor: Configure slave addresses 0-1 of RTC I2C
SAR_SLAVE_ADDR2
SAR_SLAVE_ADDR2 (rw) register accessor: Configure slave addresses 2-3 of RTC I2C
SAR_SLAVE_ADDR3
SAR_SLAVE_ADDR3 (rw) register accessor: Configure slave addresses 4-5 of RTC I2C
SAR_SLAVE_ADDR4
SAR_SLAVE_ADDR4 (rw) register accessor: Configure slave addresses 6-7 of RTC I2C