Struct esp32s2_hal::peripherals::SPI0

pub struct SPI0 { /* private fields */ }

Implementations

impl SPI0

pub unsafe fn steal() -> SPI0

Unsafely create an instance of this peripheral out of thin air.

Safety

You must ensure that you’re only using one instance of this type at a time.

pub const PTR: *const <SPI0 as Deref>::Target = {0x3f403000 as *const <esp32s2::SPI0 as core::ops::Deref>::Target}

Pointer to the register block

pub const fn ptr() -> *const <SPI0 as Deref>::Target

Return the pointer to the register block

Methods from Deref<Target = RegisterBlock>

pub fn cmd(&self) -> &Reg<CMD_SPEC>

0x00 - Command control register

pub fn addr(&self) -> &Reg<ADDR_SPEC>

0x04 - Address value

pub fn ctrl(&self) -> &Reg<CTRL_SPEC>

0x08 - SPI control register

pub fn ctrl1(&self) -> &Reg<CTRL1_SPEC>

0x0c - SPI control register 1

pub fn ctrl2(&self) -> &Reg<CTRL2_SPEC>

0x10 - SPI control register 2

pub fn clock(&self) -> &Reg<CLOCK_SPEC>

0x14 - SPI clock control register

pub fn user(&self) -> &Reg<USER_SPEC>

0x18 - SPI USER control register

pub fn user1(&self) -> &Reg<USER1_SPEC>

0x1c - SPI USER control register 1

pub fn user2(&self) -> &Reg<USER2_SPEC>

0x20 - SPI USER control register 2

pub fn mosi_dlen(&self) -> &Reg<MOSI_DLEN_SPEC>

0x24 - MOSI length

pub fn miso_dlen(&self) -> &Reg<MISO_DLEN_SPEC>

0x28 - MISO length

pub fn misc(&self) -> &Reg<MISC_SPEC>

0x2c - SPI misc register

pub fn slave(&self) -> &Reg<SLAVE_SPEC>

0x30 - SPI slave control register

pub fn slave1(&self) -> &Reg<SLAVE1_SPEC>

0x34 - SPI slave control register 1

pub fn slv_wrbuf_dlen(&self) -> &Reg<SLV_WRBUF_DLEN_SPEC>

0x38 - SPI slave Wr_BUF interrupt and CONF control register

pub fn slv_rdbuf_dlen(&self) -> &Reg<SLV_RDBUF_DLEN_SPEC>

0x3c - SPI magic error and slave control register

pub fn slv_rd_byte(&self) -> &Reg<SLV_RD_BYTE_SPEC>

0x40 - SPI interrupt control register

pub fn fsm(&self) -> &Reg<FSM_SPEC>

0x44 - SPI master status and DMA read byte control register

pub fn hold(&self) -> &Reg<HOLD_SPEC>

0x48 - SPI hold register

pub fn dma_conf(&self) -> &Reg<DMA_CONF_SPEC>

0x4c - SPI DMA control register

pub fn dma_out_link(&self) -> &Reg<DMA_OUT_LINK_SPEC>

0x50 - SPI DMA TX link configuration

pub fn dma_in_link(&self) -> &Reg<DMA_IN_LINK_SPEC>

0x54 - SPI DMA RX link configuration

pub fn dma_int_ena(&self) -> &Reg<DMA_INT_ENA_SPEC>

0x58 - SPI DMA interrupt enable register

pub fn dma_int_raw(&self) -> &Reg<DMA_INT_RAW_SPEC>

0x5c - SPI DMA interrupt raw register

pub fn dma_int_st(&self) -> &Reg<DMA_INT_ST_SPEC>

0x60 - SPI DMA interrupt status register

pub fn dma_int_clr(&self) -> &Reg<DMA_INT_CLR_SPEC>

0x64 - SPI DMA interrupt clear register

pub fn in_err_eof_des_addr(&self) -> &Reg<IN_ERR_EOF_DES_ADDR_SPEC>

0x68 - The latest SPI DMA RX descriptor address receiving error

pub fn in_suc_eof_des_addr(&self) -> &Reg<IN_SUC_EOF_DES_ADDR_SPEC>

0x6c - The latest SPI DMA eof RX descriptor address

pub fn inlink_dscr(&self) -> &Reg<INLINK_DSCR_SPEC>

0x70 - Current SPI DMA RX descriptor pointer

pub fn inlink_dscr_bf0(&self) -> &Reg<INLINK_DSCR_BF0_SPEC>

0x74 - Next SPI DMA RX descriptor pointer

pub fn inlink_dscr_bf1(&self) -> &Reg<INLINK_DSCR_BF1_SPEC>

0x78 - Current SPI DMA RX buffer pointer

pub fn out_eof_bfr_des_addr(&self) -> &Reg<OUT_EOF_BFR_DES_ADDR_SPEC>

0x7c - The latest SPI DMA eof TX buffer address

pub fn out_eof_des_addr(&self) -> &Reg<OUT_EOF_DES_ADDR_SPEC>

0x80 - The latest SPI DMA eof TX descriptor address

pub fn outlink_dscr(&self) -> &Reg<OUTLINK_DSCR_SPEC>

0x84 - Current SPI DMA TX descriptor pointer

pub fn outlink_dscr_bf0(&self) -> &Reg<OUTLINK_DSCR_BF0_SPEC>

0x88 - Next SPI DMA TX descriptor pointer

pub fn outlink_dscr_bf1(&self) -> &Reg<OUTLINK_DSCR_BF1_SPEC>

0x8c - Current SPI DMA TX buffer pointer

pub fn dma_outstatus(&self) -> &Reg<DMA_OUTSTATUS_SPEC>

0x90 - SPI DMA TX status

pub fn dma_instatus(&self) -> &Reg<DMA_INSTATUS_SPEC>

0x94 - SPI DMA RX status

pub fn w0(&self) -> &Reg<W0_SPEC>

0x98 - Data buffer 0

pub fn w1(&self) -> &Reg<W1_SPEC>

0x9c - Data buffer 1

pub fn w2(&self) -> &Reg<W2_SPEC>

0xa0 - Data buffer 2

pub fn w3(&self) -> &Reg<W3_SPEC>

0xa4 - Data buffer 3

pub fn w4(&self) -> &Reg<W4_SPEC>

0xa8 - Data buffer 4

pub fn w5(&self) -> &Reg<W5_SPEC>

0xac - Data buffer 5

pub fn w6(&self) -> &Reg<W6_SPEC>

0xb0 - Data buffer 6

pub fn w7(&self) -> &Reg<W7_SPEC>

0xb4 - Data buffer 7

pub fn w8(&self) -> &Reg<W8_SPEC>

0xb8 - Data buffer 8

pub fn w9(&self) -> &Reg<W9_SPEC>

0xbc - Data buffer 9

pub fn w10(&self) -> &Reg<W10_SPEC>

0xc0 - Data buffer 10

pub fn w11(&self) -> &Reg<W11_SPEC>

0xc4 - Data buffer 11

pub fn w12(&self) -> &Reg<W12_SPEC>

0xc8 - Data buffer 12

pub fn w13(&self) -> &Reg<W13_SPEC>

0xcc - Data buffer 13

pub fn w14(&self) -> &Reg<W14_SPEC>

0xd0 - Data buffer 14

pub fn w15(&self) -> &Reg<W15_SPEC>

0xd4 - Data buffer 15

pub fn w16(&self) -> &Reg<W16_SPEC>

0xd8 - Data buffer 16

pub fn w17(&self) -> &Reg<W17_SPEC>

0xdc - Data buffer 17

pub fn din_mode(&self) -> &Reg<DIN_MODE_SPEC>

0xe0 - SPI input delay mode configuration

pub fn din_num(&self) -> &Reg<DIN_NUM_SPEC>

0xe4 - SPI input delay number configuration

pub fn dout_mode(&self) -> &Reg<DOUT_MODE_SPEC>

0xe8 - SPI output delay mode configuration

pub fn dout_num(&self) -> &Reg<DOUT_NUM_SPEC>

0xec - SPI output delay number configuration

pub fn lcd_ctrl(&self) -> &Reg<LCD_CTRL_SPEC>

0xf0 - LCD frame control register

pub fn lcd_ctrl1(&self) -> &Reg<LCD_CTRL1_SPEC>

0xf4 - LCD frame control1 register

pub fn lcd_ctrl2(&self) -> &Reg<LCD_CTRL2_SPEC>

0xf8 - LCD frame control2 register

pub fn lcd_d_mode(&self) -> &Reg<LCD_D_MODE_SPEC>

0xfc - LCD delay number

pub fn lcd_d_num(&self) -> &Reg<LCD_D_NUM_SPEC>

0x100 - LCD delay mode

pub fn reg_date(&self) -> &Reg<REG_DATE_SPEC>

0x3fc - SPI version control

Trait Implementations

impl Debug for SPI0

fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter.

impl Deref for SPI0

type Target = <SPI0 as Deref>::Target

The resulting type after dereferencing.

fn deref(&self) -> &<SPI0 as Deref>::Target

Dereferences the value.

impl DerefMut for SPI0

fn deref_mut(&mut self) -> &mut <SPI0 as Deref>::Target

Mutably dereferences the value.

impl Peripheral for SPI0

type P = SPI0

Peripheral singleton type

unsafe fn clone_unchecked(&mut self) -> <SPI0 as Peripheral>::P

Unsafely clone (duplicate) a peripheral singleton.

fn into_ref<'a>(self) -> PeripheralRef<'a, Self::P>

where Self: 'a,

Convert a value into a PeripheralRef.