Struct esp32s2_hal::peripherals::LPWR

pub struct LPWR { /* private fields */ }

Implementations

impl LPWR

pub unsafe fn steal() -> LPWR

Unsafely create an instance of this peripheral out of thin air.

Safety

You must ensure that you’re only using one instance of this type at a time.

pub const PTR: *const <RTC_CNTL as Deref>::Target = {0x3f408000 as *const <esp32s2::RTC_CNTL as core::ops::Deref>::Target}

Pointer to the register block

pub const fn ptr() -> *const <RTC_CNTL as Deref>::Target

Return the pointer to the register block

Methods from Deref<Target = RegisterBlock>

pub fn options0(&self) -> &Reg<OPTIONS0_SPEC>

0x00 - Sets the power options of crystal and PLL clocks, and initiates reset by software

pub fn slp_timer0(&self) -> &Reg<SLP_TIMER0_SPEC>

0x04 - RTC timer threshold register 0

pub fn slp_timer1(&self) -> &Reg<SLP_TIMER1_SPEC>

0x08 - RTC timer threshold register 1

pub fn time_update(&self) -> &Reg<TIME_UPDATE_SPEC>

0x0c - RTC timer update control register

pub fn time_low0(&self) -> &Reg<TIME_LOW0_SPEC>

0x10 - Stores the lower 32 bits of RTC timer 0.

pub fn time_high0(&self) -> &Reg<TIME_HIGH0_SPEC>

0x14 - Stores the higher 16 bits of RTC timer 0

pub fn state0(&self) -> &Reg<STATE0_SPEC>

0x18 - Configures the sleep / reject / wakeup state

pub fn timer1(&self) -> &Reg<TIMER1_SPEC>

0x1c - Configures CPU stall options

pub fn timer2(&self) -> &Reg<TIMER2_SPEC>

0x20 - Configures RTC slow clock and touch controller

pub fn timer3(&self) -> &Reg<TIMER3_SPEC>

0x24 - configure some wait time for power on

pub fn timer4(&self) -> &Reg<TIMER4_SPEC>

0x28 - configure some wait time for power on

pub fn timer5(&self) -> &Reg<TIMER5_SPEC>

0x2c - Configures the minimal sleep cycles

pub fn timer6(&self) -> &Reg<TIMER6_SPEC>

0x30 - Configure minimal sleep cycles register

pub fn ana_conf(&self) -> &Reg<ANA_CONF_SPEC>

0x34 - Configures the power options for I2C and PLLA

pub fn reset_state(&self) -> &Reg<RESET_STATE_SPEC>

0x38 - Indicates the CPU reset source. For more information about the reset cause, please refer to Table \ref{table:resetreasons} in Chapter \ref{module:ResetandClock} \textit{ ameref{module:ResetandClock}}.

pub fn wakeup_state(&self) -> &Reg<WAKEUP_STATE_SPEC>

0x3c - Wakeup bitmap enabling register

pub fn int_ena_rtc(&self) -> &Reg<INT_ENA_RTC_SPEC>

0x40 - RTC interrupt enabling register

pub fn int_raw_rtc(&self) -> &Reg<INT_RAW_RTC_SPEC>

0x44 - RTC interrupt raw register

pub fn int_st_rtc(&self) -> &Reg<INT_ST_RTC_SPEC>

0x48 - RTC interrupt state register

pub fn int_clr_rtc(&self) -> &Reg<INT_CLR_RTC_SPEC>

0x4c - RTC interrupt clear register

pub fn store0(&self) -> &Reg<STORE0_SPEC>

0x50 - Reservation register 0

pub fn store1(&self) -> &Reg<STORE1_SPEC>

0x54 - Reservation register 1

pub fn store2(&self) -> &Reg<STORE2_SPEC>

0x58 - Reservation register 2

pub fn store3(&self) -> &Reg<STORE3_SPEC>

0x5c - Reservation register 3

pub fn ext_xtl_conf(&self) -> &Reg<EXT_XTL_CONF_SPEC>

0x60 - 32 kHz crystal oscillator configuration register

pub fn ext_wakeup_conf(&self) -> &Reg<EXT_WAKEUP_CONF_SPEC>

0x64 - GPIO wakeup configuration register

pub fn slp_reject_conf(&self) -> &Reg<SLP_REJECT_CONF_SPEC>

0x68 - Configures sleep / reject options

pub fn cpu_period_conf(&self) -> &Reg<CPU_PERIOD_CONF_SPEC>

0x6c - CPU sel option

pub fn sdio_act_conf(&self) -> &Reg<SDIO_ACT_CONF_SPEC>

0x70 - configure sdio active register

pub fn clk_conf(&self) -> &Reg<CLK_CONF_SPEC>

0x74 - RTC clock configuration register

pub fn slow_clk_conf(&self) -> &Reg<SLOW_CLK_CONF_SPEC>

0x78 - RTC slow clock configuration register

pub fn sdio_conf(&self) -> &Reg<SDIO_CONF_SPEC>

0x7c - configure vddsdio register

pub fn bias_conf(&self) -> &Reg<BIAS_CONF_SPEC>

0x80 - configure power register

pub fn reg(&self) -> &Reg<REG_SPEC>

0x84 - RTC/DIG regulator configuration register

pub fn pwc(&self) -> &Reg<PWC_SPEC>

0x88 - RTC power configuraiton register

pub fn dig_pwc(&self) -> &Reg<DIG_PWC_SPEC>

0x8c - Digital system power configuraiton register

pub fn dig_iso(&self) -> &Reg<DIG_ISO_SPEC>

0x90 - Digital system ISO configuration register

pub fn wdtconfig0(&self) -> &Reg<WDTCONFIG0_SPEC>

0x94 - RTC watchdog configuration register

pub fn wdtconfig1(&self) -> &Reg<WDTCONFIG1_SPEC>

0x98 - Configures the hold time of RTC watchdog at level 1

pub fn wdtconfig2(&self) -> &Reg<WDTCONFIG2_SPEC>

0x9c - Configures the hold time of RTC watchdog at level 2

pub fn wdtconfig3(&self) -> &Reg<WDTCONFIG3_SPEC>

0xa0 - Configures the hold time of RTC watchdog at level 3

pub fn wdtconfig4(&self) -> &Reg<WDTCONFIG4_SPEC>

0xa4 - Configures the hold time of RTC watchdog at level 4

pub fn wdtfeed(&self) -> &Reg<WDTFEED_SPEC>

0xa8 - RTC watchdog SW feed configuration register

pub fn wdtwprotect(&self) -> &Reg<WDTWPROTECT_SPEC>

0xac - RTC watchdog write protection configuration register

pub fn swd_conf(&self) -> &Reg<SWD_CONF_SPEC>

0xb0 - Super watchdog configuration register

pub fn swd_wprotect(&self) -> &Reg<SWD_WPROTECT_SPEC>

0xb4 - Super watchdog write protection configuration register

pub fn sw_cpu_stall(&self) -> &Reg<SW_CPU_STALL_SPEC>

0xb8 - CPU stall configuration register

pub fn store4(&self) -> &Reg<STORE4_SPEC>

0xbc - Reservation register 4

pub fn store5(&self) -> &Reg<STORE5_SPEC>

0xc0 - Reservation register 5

pub fn store6(&self) -> &Reg<STORE6_SPEC>

0xc4 - Reservation register 6

pub fn store7(&self) -> &Reg<STORE7_SPEC>

0xc8 - Reservation register 7

pub fn low_power_st(&self) -> &Reg<LOW_POWER_ST_SPEC>

0xcc - RTC main state machine status register

pub fn diag0(&self) -> &Reg<DIAG0_SPEC>

0xd0 - debug register

pub fn pad_hold(&self) -> &Reg<PAD_HOLD_SPEC>

0xd4 - Configures the hold options for RTC GPIOs

pub fn dig_pad_hold(&self) -> &Reg<DIG_PAD_HOLD_SPEC>

0xd8 - Configures the hold option for digital GPIOs

pub fn ext_wakeup1(&self) -> &Reg<EXT_WAKEUP1_SPEC>

0xdc - EXT1 wakeup configuration register

pub fn ext_wakeup1_status(&self) -> &Reg<EXT_WAKEUP1_STATUS_SPEC>

0xe0 - EXT1 wakeup source register

pub fn brown_out(&self) -> &Reg<BROWN_OUT_SPEC>

0xe4 - Brownout configuration register

pub fn time_low1(&self) -> &Reg<TIME_LOW1_SPEC>

0xe8 - Stores the lower 32 bits of RTC timer 1

pub fn time_high1(&self) -> &Reg<TIME_HIGH1_SPEC>

0xec - Stores the higher 16 bits of RTC timer 1

pub fn xtal32k_clk_factor(&self) -> &Reg<XTAL32K_CLK_FACTOR_SPEC>

0xf0 - Configures the divider factor for the backup clock of 32 kHz crystal oscillator

pub fn xtal32k_conf(&self) -> &Reg<XTAL32K_CONF_SPEC>

0xf4 - 32 kHz crystal oscillator configuration register

pub fn ulp_cp_timer(&self) -> &Reg<ULP_CP_TIMER_SPEC>

0xf8 - Configure coprocessor timer

pub fn ulp_cp_ctrl(&self) -> &Reg<ULP_CP_CTRL_SPEC>

0xfc - ULP-FSM configuration register

pub fn cocpu_ctrl(&self) -> &Reg<COCPU_CTRL_SPEC>

0x100 - ULP-RISCV configuration register

pub fn touch_ctrl1(&self) -> &Reg<TOUCH_CTRL1_SPEC>

0x104 - Touch control register

pub fn touch_ctrl2(&self) -> &Reg<TOUCH_CTRL2_SPEC>

0x108 - Touch control register

pub fn touch_scan_ctrl(&self) -> &Reg<TOUCH_SCAN_CTRL_SPEC>

0x10c - Configure touch scan settings

pub fn touch_slp_thres(&self) -> &Reg<TOUCH_SLP_THRES_SPEC>

0x110 - Configure the settings of touch sleep pad

pub fn touch_approach(&self) -> &Reg<TOUCH_APPROACH_SPEC>

0x114 - Configure touch approach settings

pub fn touch_filter_ctrl(&self) -> &Reg<TOUCH_FILTER_CTRL_SPEC>

0x118 - Configure touch filter settings

pub fn usb_conf(&self) -> &Reg<USB_CONF_SPEC>

0x11c - configure usb control register

pub fn touch_timeout_ctrl(&self) -> &Reg<TOUCH_TIMEOUT_CTRL_SPEC>

0x120 - Configure touch timeout settings

pub fn slp_reject_cause(&self) -> &Reg<SLP_REJECT_CAUSE_SPEC>

0x124 - Stores the reject-to-sleep cause.

pub fn options1(&self) -> &Reg<OPTIONS1_SPEC>

0x128 - RTC option register

pub fn slp_wakeup_cause(&self) -> &Reg<SLP_WAKEUP_CAUSE_SPEC>

0x12c - Stores the sleep-to-wakeup cause.

pub fn ulp_cp_timer_1(&self) -> &Reg<ULP_CP_TIMER_1_SPEC>

0x130 - Configure sleep cycle of the timer

pub fn date(&self) -> &Reg<DATE_SPEC>

0x138 -

Trait Implementations

impl Debug for LPWR

fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter.

impl Deref for LPWR

type Target = <RTC_CNTL as Deref>::Target

The resulting type after dereferencing.

fn deref(&self) -> &<LPWR as Deref>::Target

Dereferences the value.

impl DerefMut for LPWR

fn deref_mut(&mut self) -> &mut <LPWR as Deref>::Target

Mutably dereferences the value.

impl Peripheral for LPWR

type P = LPWR

Peripheral singleton type

unsafe fn clone_unchecked(&mut self) -> <LPWR as Peripheral>::P

Unsafely clone (duplicate) a peripheral singleton.

fn into_ref<'a>(self) -> PeripheralRef<'a, Self::P>

where Self: 'a,

Convert a value into a PeripheralRef.