Enum esp32s2_hal::peripherals::Interrupt

#[repr(u16)]
pub enum Interrupt {
    WIFI_MAC,
    WIFI_NMI,
    WIFI_PWR,
    WIFI_BB,
    BT_MAC,
    BT_BB,
    BT_BB_NMI,
    RWBT,
    RWBLE,
    RWBT_NMI,
    RWBLE_NMI,
    SLC0,
    SLC1,
    UHCI0,
    UHCI1,
    TG0_T0_LEVEL,
    TG0_T1_LEVEL,
    TG0_WDT_LEVEL,
    TG0_LACT_LEVEL,
    TG1_T0_LEVEL,
    TG1_T1_LEVEL,
    TG1_WDT_LEVEL,
    TG1_LACT_LEVEL,
    GPIO,
    GPIO_NMI,
    GPIO_INTR_2,
    GPIO_NMI_2,
    DEDICATED_GPIO,
    FROM_CPU_INTR0,
    FROM_CPU_INTR1,
    FROM_CPU_INTR2,
    FROM_CPU_INTR3,
    SPI1,
    SPI2,
    SPI3,
    I2S0,
    I2S1,
    UART0,
    UART1,
    UART2,
    SDIO_HOST,
    LEDC,
    EFUSE,
    TWAI0,
    USB,
    RTC_CORE,
    RMT,
    PCNT,
    I2C_EXT0,
    I2C_EXT1,
    RSA,
    SHA,
    AES,
    SPI2_DMA,
    SPI3_DMA,
    WDT,
    TIMER1,
    TIMER2,
    TG0_T0_EDGE,
    TG0_T1_EDGE,
    TG0_WDT_EDGE,
    TG0_LACT_EDGE,
    TG1_T0_EDGE,
    TG1_T1_EDGE,
    TG1_WDT_EDGE,
    TG1_LACT_EDGE,
    CACHE_IA,
    SYSTIMER_TARGET0,
    SYSTIMER_TARGET1,
    SYSTIMER_TARGET2,
    PMS_PRO_IRAM0_ILG,
    PMS_PRO_DRAM0_ILG,
    PMS_PRO_DPORT_ILG,
    PMS_PRO_AHB_ILG,
    PMS_PRO_CACHE_ILG,
    PMS_DMA_APB_I_ILG,
    PMS_DMA_RX_I_ILG,
    PMS_DMA_TX_I_ILG,
    SPI0_REJECT_CACHE,
    SPI4_DMA,
    SPI4,
    ICACHE_PRELOAD,
    DCACHE_PRELOAD,
    APB_ADC,
    CPU_PERI_ERR,
    APB_PERI_ERR,
    DCACHE_SYNC,
    ICACHE_SYNC,
}

Enumeration of all the interrupts.

Variants

WIFI_MAC

0 - WIFI_MAC

WIFI_NMI

1 - WIFI_NMI

WIFI_PWR

2 - WIFI_PWR

WIFI_BB

3 - WIFI_BB

BT_MAC

4 - BT_MAC

BT_BB

5 - BT_BB

BT_BB_NMI

6 - BT_BB_NMI

RWBT

7 - RWBT

RWBLE

8 - RWBLE

RWBT_NMI

9 - RWBT_NMI

RWBLE_NMI

10 - RWBLE_NMI

SLC0

11 - SLC0

SLC1

12 - SLC1

UHCI0

13 - UHCI0

UHCI1

14 - UHCI1

TG0_T0_LEVEL

15 - TG0_T0_LEVEL

TG0_T1_LEVEL

16 - TG0_T1_LEVEL

TG0_WDT_LEVEL

17 - TG0_WDT_LEVEL

TG0_LACT_LEVEL

18 - TG0_LACT_LEVEL

TG1_T0_LEVEL

19 - TG1_T0_LEVEL

TG1_T1_LEVEL

20 - TG1_T1_LEVEL

TG1_WDT_LEVEL

21 - TG1_WDT_LEVEL

TG1_LACT_LEVEL

22 - TG1_LACT_LEVEL

GPIO

23 - GPIO

GPIO_NMI

24 - GPIO_NMI

GPIO_INTR_2

25 - GPIO_INTR_2

GPIO_NMI_2

26 - GPIO_NMI_2

DEDICATED_GPIO

27 - DEDICATED_GPIO

FROM_CPU_INTR0

28 - FROM_CPU_INTR0

FROM_CPU_INTR1

29 - FROM_CPU_INTR1

FROM_CPU_INTR2

30 - FROM_CPU_INTR2

FROM_CPU_INTR3

31 - FROM_CPU_INTR3

SPI1

32 - SPI1

SPI2

33 - SPI2

SPI3

34 - SPI3

I2S0

35 - I2S0

I2S1

36 - I2S1

UART0

37 - UART0

UART1

38 - UART1

UART2

39 - UART2

SDIO_HOST

40 - SDIO_HOST

LEDC

45 - LEDC

EFUSE

46 - EFUSE

TWAI0

47 - TWAI0

USB

48 - USB

RTC_CORE

49 - RTC_CORE

RMT

50 - RMT

PCNT

51 - PCNT

I2C_EXT0

52 - I2C_EXT0

I2C_EXT1

53 - I2C_EXT1

RSA

54 - RSA

SHA

55 - SHA

AES

56 - AES

SPI2_DMA

57 - SPI2_DMA

SPI3_DMA

58 - SPI3_DMA

WDT

59 - WDT

TIMER1

60 - TIMER1

TIMER2

61 - TIMER2

TG0_T0_EDGE

62 - TG0_T0_EDGE

TG0_T1_EDGE

63 - TG0_T1_EDGE

TG0_WDT_EDGE

64 - TG0_WDT_EDGE

TG0_LACT_EDGE

65 - TG0_LACT_EDGE

TG1_T0_EDGE

66 - TG1_T0_EDGE

TG1_T1_EDGE

67 - TG1_T1_EDGE

TG1_WDT_EDGE

68 - TG1_WDT_EDGE

TG1_LACT_EDGE

69 - TG1_LACT_EDGE

CACHE_IA

70 - CACHE_IA

SYSTIMER_TARGET0

71 - SYSTIMER_TARGET0

SYSTIMER_TARGET1

72 - SYSTIMER_TARGET1

SYSTIMER_TARGET2

73 - SYSTIMER_TARGET2

PMS_PRO_IRAM0_ILG

75 - PMS_PRO_IRAM0_ILG

PMS_PRO_DRAM0_ILG

76 - PMS_PRO_DRAM0_ILG

PMS_PRO_DPORT_ILG

77 - PMS_PRO_DPORT_ILG

PMS_PRO_AHB_ILG

78 - PMS_PRO_AHB_ILG

PMS_PRO_CACHE_ILG

79 - PMS_PRO_CACHE_ILG

PMS_DMA_APB_I_ILG

80 - PMS_DMA_APB_I_ILG

PMS_DMA_RX_I_ILG

81 - PMS_DMA_RX_I_ILG

PMS_DMA_TX_I_ILG

82 - PMS_DMA_TX_I_ILG

SPI0_REJECT_CACHE

83 - SPI0_REJECT_CACHE

SPI4_DMA

85 - SPI4_DMA

SPI4

86 - SPI4

ICACHE_PRELOAD

87 - ICACHE_PRELOAD

DCACHE_PRELOAD

88 - DCACHE_PRELOAD

APB_ADC

89 - APB_ADC

CPU_PERI_ERR

91 - CPU_PERI_ERR

APB_PERI_ERR

92 - APB_PERI_ERR

DCACHE_SYNC

93 - DCACHE_SYNC

ICACHE_SYNC

94 - ICACHE_SYNC

Implementations

impl Interrupt

pub fn try_from(value: u16) -> Result<Interrupt, TryFromInterruptError>

Attempt to convert a given value into an Interrupt

Trait Implementations

impl Clone for Interrupt

fn clone(&self) -> Interrupt

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Interrupt

fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter.

impl InterruptNumber for Interrupt

fn number(self) -> u16

Return the interrupt number associated with this variant.

impl PartialEq<Interrupt> for Interrupt

fn eq(&self, other: &Interrupt) -> bool

This method tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

This method tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Interrupt

impl Eq for Interrupt

impl StructuralEq for Interrupt

impl StructuralPartialEq for Interrupt