#[repr(u16)]pub enum Interrupt {
Show 95 variants
LP_WDT = 1,
LP_TIMER0 = 2,
LP_TIMER1 = 3,
PMU0 = 6,
PMU1 = 7,
LP_ANA = 8,
LP_ADC = 9,
LP_GPIO = 10,
LP_I2C0 = 11,
LP_I2S0 = 12,
LP_TOUCH = 14,
LP_TSENS = 15,
LP_UART = 16,
LP_SYS = 19,
LP_HUK = 20,
USB_DEVICE = 22,
DMA = 24,
SPI2 = 25,
SPI3 = 26,
I2S0 = 27,
I2S1 = 28,
I2S2 = 29,
UHCI0 = 30,
UART0 = 31,
UART1 = 32,
UART2 = 33,
UART3 = 34,
UART4 = 35,
PWM0 = 38,
PWM1 = 39,
TWAI0 = 40,
TWAI1 = 41,
TWAI2 = 42,
RMT = 43,
I2C0 = 44,
I2C1 = 45,
TG0_T0 = 46,
TG0_T1 = 47,
TG0_WDT = 48,
TG1_T0 = 49,
TG1_T1 = 50,
TG1_WDT = 51,
LEDC = 52,
SYSTIMER_TARGET0 = 53,
SYSTIMER_TARGET1 = 54,
SYSTIMER_TARGET2 = 55,
AHB_PDMA_IN_CH0 = 56,
AHB_PDMA_IN_CH1 = 57,
AHB_PDMA_IN_CH2 = 58,
AHB_PDMA_OUT_CH0 = 59,
AHB_PDMA_OUT_CH1 = 60,
AHB_PDMA_OUT_CH2 = 61,
AXI_PDMA_IN_CH0 = 62,
AXI_PDMA_IN_CH1 = 63,
AXI_PDMA_IN_CH2 = 64,
AXI_PDMA_OUT_CH0 = 65,
AXI_PDMA_OUT_CH1 = 66,
AXI_PDMA_OUT_CH2 = 67,
RSA = 68,
AES = 69,
SHA = 70,
ECC = 71,
GPIO = 74,
GPIO_INT1 = 75,
GPIO_INT2 = 76,
GPIO_INT3 = 77,
GPIO_PAD_COMP = 78,
CACHE = 83,
CSI_BRIDGE = 85,
DSI_BRIDGE = 86,
CSI = 87,
DSI = 88,
JPEG = 95,
PPA = 96,
ISP = 100,
I3C = 101,
I3C_SLV = 102,
HP_SYS = 110,
PCNT = 111,
PAU = 112,
PARLIO_RX = 113,
PARLIO_TX = 114,
H264_DMA2D_OUT_CH0 = 115,
H264_DMA2D_OUT_CH1 = 116,
H264_DMA2D_OUT_CH2 = 117,
H264_DMA2D_OUT_CH3 = 118,
H264_DMA2D_OUT_CH4 = 119,
H264_DMA2D_IN_CH0 = 120,
H264_DMA2D_IN_CH1 = 121,
H264_DMA2D_IN_CH2 = 122,
H264_DMA2D_IN_CH3 = 123,
H264_DMA2D_IN_CH4 = 124,
H264_DMA2D_IN_CH5 = 125,
H264_REG = 126,
ASSIST_DEBUG = 127,
}
Expand description
Enumeration of all the interrupts.
Variants§
LP_WDT = 1
1 - LP_WDT
LP_TIMER0 = 2
2 - LP_TIMER0
LP_TIMER1 = 3
3 - LP_TIMER1
PMU0 = 6
6 - PMU0
PMU1 = 7
7 - PMU1
LP_ANA = 8
8 - LP_ANA
LP_ADC = 9
9 - LP_ADC
LP_GPIO = 10
10 - LP_GPIO
LP_I2C0 = 11
11 - LP_I2C0
LP_I2S0 = 12
12 - LP_I2S0
LP_TOUCH = 14
14 - LP_TOUCH
LP_TSENS = 15
15 - LP_TSENS
LP_UART = 16
16 - LP_UART
LP_SYS = 19
19 - LP_SYS
LP_HUK = 20
20 - LP_HUK
USB_DEVICE = 22
22 - USB_DEVICE
DMA = 24
24 - DMA
SPI2 = 25
25 - SPI2
SPI3 = 26
26 - SPI3
I2S0 = 27
27 - I2S0
I2S1 = 28
28 - I2S1
I2S2 = 29
29 - I2S2
UHCI0 = 30
30 - UHCI0
UART0 = 31
31 - UART0
UART1 = 32
32 - UART1
UART2 = 33
33 - UART2
UART3 = 34
34 - UART3
UART4 = 35
35 - UART4
PWM0 = 38
38 - PWM0
PWM1 = 39
39 - PWM1
TWAI0 = 40
40 - TWAI0
TWAI1 = 41
41 - TWAI1
TWAI2 = 42
42 - TWAI2
RMT = 43
43 - RMT
I2C0 = 44
44 - I2C0
I2C1 = 45
45 - I2C1
TG0_T0 = 46
46 - TG0_T0
TG0_T1 = 47
47 - TG0_T1
TG0_WDT = 48
48 - TG0_WDT
TG1_T0 = 49
49 - TG1_T0
TG1_T1 = 50
50 - TG1_T1
TG1_WDT = 51
51 - TG1_WDT
LEDC = 52
52 - LEDC
SYSTIMER_TARGET0 = 53
53 - SYSTIMER_TARGET0
SYSTIMER_TARGET1 = 54
54 - SYSTIMER_TARGET1
SYSTIMER_TARGET2 = 55
55 - SYSTIMER_TARGET2
AHB_PDMA_IN_CH0 = 56
56 - AHB_PDMA_IN_CH0
AHB_PDMA_IN_CH1 = 57
57 - AHB_PDMA_IN_CH1
AHB_PDMA_IN_CH2 = 58
58 - AHB_PDMA_IN_CH2
AHB_PDMA_OUT_CH0 = 59
59 - AHB_PDMA_OUT_CH0
AHB_PDMA_OUT_CH1 = 60
60 - AHB_PDMA_OUT_CH1
AHB_PDMA_OUT_CH2 = 61
61 - AHB_PDMA_OUT_CH2
AXI_PDMA_IN_CH0 = 62
62 - AXI_PDMA_IN_CH0
AXI_PDMA_IN_CH1 = 63
63 - AXI_PDMA_IN_CH1
AXI_PDMA_IN_CH2 = 64
64 - AXI_PDMA_IN_CH2
AXI_PDMA_OUT_CH0 = 65
65 - AXI_PDMA_OUT_CH0
AXI_PDMA_OUT_CH1 = 66
66 - AXI_PDMA_OUT_CH1
AXI_PDMA_OUT_CH2 = 67
67 - AXI_PDMA_OUT_CH2
RSA = 68
68 - RSA
AES = 69
69 - AES
SHA = 70
70 - SHA
ECC = 71
71 - ECC
GPIO = 74
74 - GPIO
GPIO_INT1 = 75
75 - GPIO_INT1
GPIO_INT2 = 76
76 - GPIO_INT2
GPIO_INT3 = 77
77 - GPIO_INT3
GPIO_PAD_COMP = 78
78 - GPIO_PAD_COMP
CACHE = 83
83 - CACHE
CSI_BRIDGE = 85
85 - CSI_BRIDGE
DSI_BRIDGE = 86
86 - DSI_BRIDGE
CSI = 87
87 - CSI
DSI = 88
88 - DSI
JPEG = 95
95 - JPEG
PPA = 96
96 - PPA
ISP = 100
100 - ISP
I3C = 101
101 - I3C
I3C_SLV = 102
102 - I3C_SLV
HP_SYS = 110
110 - HP_SYS
PCNT = 111
111 - PCNT
PAU = 112
112 - PAU
PARLIO_RX = 113
113 - PARLIO_RX
PARLIO_TX = 114
114 - PARLIO_TX
H264_DMA2D_OUT_CH0 = 115
115 - H264_DMA2D_OUT_CH0
H264_DMA2D_OUT_CH1 = 116
116 - H264_DMA2D_OUT_CH1
H264_DMA2D_OUT_CH2 = 117
117 - H264_DMA2D_OUT_CH2
H264_DMA2D_OUT_CH3 = 118
118 - H264_DMA2D_OUT_CH3
H264_DMA2D_OUT_CH4 = 119
119 - H264_DMA2D_OUT_CH4
H264_DMA2D_IN_CH0 = 120
120 - H264_DMA2D_IN_CH0
H264_DMA2D_IN_CH1 = 121
121 - H264_DMA2D_IN_CH1
H264_DMA2D_IN_CH2 = 122
122 - H264_DMA2D_IN_CH2
H264_DMA2D_IN_CH3 = 123
123 - H264_DMA2D_IN_CH3
H264_DMA2D_IN_CH4 = 124
124 - H264_DMA2D_IN_CH4
H264_DMA2D_IN_CH5 = 125
125 - H264_DMA2D_IN_CH5
H264_REG = 126
126 - H264_REG
ASSIST_DEBUG = 127
127 - ASSIST_DEBUG