Struct INTERRUPT_CORE1

pub struct INTERRUPT_CORE1 { /* private fields */ }

Expand description

Interrupt Controller (Core 1)

Implementations§

impl INTERRUPT_CORE1

pub const PTR: const RegisterBlock = {0x500d6800 as const interrupt_core1::RegisterBlock}

Pointer to the register block

pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

pub unsafe fn steal() -> Self

Steal an instance of this peripheral

§Safety

Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.

Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.

Methods from Deref<Target = RegisterBlock>§

pub fn lp_rtc_int_map(&self) -> &LP_RTC_INT_MAP

0x00 - NA

pub fn lp_wdt_int_map(&self) -> &LP_WDT_INT_MAP

0x04 - NA

pub fn lp_timer_reg_0_int_map(&self) -> &LP_TIMER_REG_0_INT_MAP

0x08 - NA

pub fn lp_timer_reg_1_int_map(&self) -> &LP_TIMER_REG_1_INT_MAP

0x0c - NA

pub fn mb_hp_int_map(&self) -> &MB_HP_INT_MAP

0x10 - NA

pub fn mb_lp_int_map(&self) -> &MB_LP_INT_MAP

0x14 - NA

pub fn pmu_reg_0_int_map(&self) -> &PMU_REG_0_INT_MAP

0x18 - NA

pub fn pmu_reg_1_int_map(&self) -> &PMU_REG_1_INT_MAP

0x1c - NA

pub fn lp_anaperi_int_map(&self) -> &LP_ANAPERI_INT_MAP

0x20 - NA

pub fn lp_adc_int_map(&self) -> &LP_ADC_INT_MAP

0x24 - NA

pub fn lp_gpio_int_map(&self) -> &LP_GPIO_INT_MAP

0x28 - NA

pub fn lp_i2c_int_map(&self) -> &LP_I2C_INT_MAP

0x2c - NA

pub fn lp_i2s_int_map(&self) -> &LP_I2S_INT_MAP

0x30 - NA

pub fn lp_spi_int_map(&self) -> &LP_SPI_INT_MAP

0x34 - NA

pub fn lp_touch_int_map(&self) -> &LP_TOUCH_INT_MAP

0x38 - NA

pub fn lp_tsens_int_map(&self) -> &LP_TSENS_INT_MAP

0x3c - NA

pub fn lp_uart_int_map(&self) -> &LP_UART_INT_MAP

0x40 - NA

pub fn lp_efuse_int_map(&self) -> &LP_EFUSE_INT_MAP

0x44 - NA

pub fn lp_sw_int_map(&self) -> &LP_SW_INT_MAP

0x48 - NA

pub fn lp_sysreg_int_map(&self) -> &LP_SYSREG_INT_MAP

0x4c - NA

pub fn lp_huk_int_map(&self) -> &LP_HUK_INT_MAP

0x50 - NA

pub fn sys_icm_int_map(&self) -> &SYS_ICM_INT_MAP

0x54 - NA

pub fn usb_device_int_map(&self) -> &USB_DEVICE_INT_MAP

0x58 - NA

pub fn sdio_host_int_map(&self) -> &SDIO_HOST_INT_MAP

0x5c - NA

pub fn gdma_int_map(&self) -> &GDMA_INT_MAP

0x60 - NA

pub fn spi2_int_map(&self) -> &SPI2_INT_MAP

0x64 - NA

pub fn spi3_int_map(&self) -> &SPI3_INT_MAP

0x68 - NA

pub fn i2s0_int_map(&self) -> &I2S0_INT_MAP

0x6c - NA

pub fn i2s1_int_map(&self) -> &I2S1_INT_MAP

0x70 - NA

pub fn i2s2_int_map(&self) -> &I2S2_INT_MAP

0x74 - NA

pub fn uhci0_int_map(&self) -> &UHCI0_INT_MAP

0x78 - NA

pub fn uart0_int_map(&self) -> &UART0_INT_MAP

0x7c - NA

pub fn uart1_int_map(&self) -> &UART1_INT_MAP

0x80 - NA

pub fn uart2_int_map(&self) -> &UART2_INT_MAP

0x84 - NA

pub fn uart3_int_map(&self) -> &UART3_INT_MAP

0x88 - NA

pub fn uart4_int_map(&self) -> &UART4_INT_MAP

0x8c - NA

pub fn lcd_cam_int_map(&self) -> &LCD_CAM_INT_MAP

0x90 - NA

pub fn adc_int_map(&self) -> &ADC_INT_MAP

0x94 - NA

pub fn pwm0_int_map(&self) -> &PWM0_INT_MAP

0x98 - NA

pub fn pwm1_int_map(&self) -> &PWM1_INT_MAP

0x9c - NA

pub fn can0_int_map(&self) -> &CAN0_INT_MAP

0xa0 - NA

pub fn can1_int_map(&self) -> &CAN1_INT_MAP

0xa4 - NA

pub fn can2_int_map(&self) -> &CAN2_INT_MAP

0xa8 - NA

pub fn rmt_int_map(&self) -> &RMT_INT_MAP

0xac - NA

pub fn i2c0_int_map(&self) -> &I2C0_INT_MAP

0xb0 - NA

pub fn i2c1_int_map(&self) -> &I2C1_INT_MAP

0xb4 - NA

pub fn timergrp0_t0_int_map(&self) -> &TIMERGRP0_T0_INT_MAP

0xb8 - NA

pub fn timergrp0_t1_int_map(&self) -> &TIMERGRP0_T1_INT_MAP

0xbc - NA

pub fn timergrp0_wdt_int_map(&self) -> &TIMERGRP0_WDT_INT_MAP

0xc0 - NA

pub fn timergrp1_t0_int_map(&self) -> &TIMERGRP1_T0_INT_MAP

0xc4 - NA

pub fn timergrp1_t1_int_map(&self) -> &TIMERGRP1_T1_INT_MAP

0xc8 - NA

pub fn timergrp1_wdt_int_map(&self) -> &TIMERGRP1_WDT_INT_MAP

0xcc - NA

pub fn ledc_int_map(&self) -> &LEDC_INT_MAP

0xd0 - NA

pub fn systimer_target0_int_map(&self) -> &SYSTIMER_TARGET0_INT_MAP

0xd4 - NA

pub fn systimer_target1_int_map(&self) -> &SYSTIMER_TARGET1_INT_MAP

0xd8 - NA

pub fn systimer_target2_int_map(&self) -> &SYSTIMER_TARGET2_INT_MAP

0xdc - NA

pub fn ahb_pdma_in_ch0_int_map(&self) -> &AHB_PDMA_IN_CH0_INT_MAP

0xe0 - NA

pub fn ahb_pdma_in_ch1_int_map(&self) -> &AHB_PDMA_IN_CH1_INT_MAP

0xe4 - NA

pub fn ahb_pdma_in_ch2_int_map(&self) -> &AHB_PDMA_IN_CH2_INT_MAP

0xe8 - NA

pub fn ahb_pdma_out_ch0_int_map(&self) -> &AHB_PDMA_OUT_CH0_INT_MAP

0xec - NA

pub fn ahb_pdma_out_ch1_int_map(&self) -> &AHB_PDMA_OUT_CH1_INT_MAP

0xf0 - NA

pub fn ahb_pdma_out_ch2_int_map(&self) -> &AHB_PDMA_OUT_CH2_INT_MAP

0xf4 - NA

pub fn axi_pdma_in_ch0_int_map(&self) -> &AXI_PDMA_IN_CH0_INT_MAP

0xf8 - NA

pub fn axi_pdma_in_ch1_int_map(&self) -> &AXI_PDMA_IN_CH1_INT_MAP

0xfc - NA

pub fn axi_pdma_in_ch2_int_map(&self) -> &AXI_PDMA_IN_CH2_INT_MAP

0x100 - NA

pub fn axi_pdma_out_ch0_int_map(&self) -> &AXI_PDMA_OUT_CH0_INT_MAP

0x104 - NA

pub fn axi_pdma_out_ch1_int_map(&self) -> &AXI_PDMA_OUT_CH1_INT_MAP

0x108 - NA

pub fn axi_pdma_out_ch2_int_map(&self) -> &AXI_PDMA_OUT_CH2_INT_MAP

0x10c - NA

pub fn rsa_int_map(&self) -> &RSA_INT_MAP

0x110 - NA

pub fn aes_int_map(&self) -> &AES_INT_MAP

0x114 - NA

pub fn sha_int_map(&self) -> &SHA_INT_MAP

0x118 - NA

pub fn ecc_int_map(&self) -> &ECC_INT_MAP

0x11c - NA

pub fn ecdsa_int_map(&self) -> &ECDSA_INT_MAP

0x120 - NA

pub fn km_int_map(&self) -> &KM_INT_MAP

0x124 - NA

pub fn gpio_int0_map(&self) -> &GPIO_INT0_MAP

0x128 - NA

pub fn gpio_int1_map(&self) -> &GPIO_INT1_MAP

0x12c - NA

pub fn gpio_int2_map(&self) -> &GPIO_INT2_MAP

0x130 - NA

pub fn gpio_int3_map(&self) -> &GPIO_INT3_MAP

0x134 - NA

pub fn gpio_pad_comp_int_map(&self) -> &GPIO_PAD_COMP_INT_MAP

0x138 - NA

pub fn cpu_int_from_cpu_0_map(&self) -> &CPU_INT_FROM_CPU_0_MAP

0x13c - NA

pub fn cpu_int_from_cpu_1_map(&self) -> &CPU_INT_FROM_CPU_1_MAP

0x140 - NA

pub fn cpu_int_from_cpu_2_map(&self) -> &CPU_INT_FROM_CPU_2_MAP

0x144 - NA

pub fn cpu_int_from_cpu_3_map(&self) -> &CPU_INT_FROM_CPU_3_MAP

0x148 - NA

pub fn cache_int_map(&self) -> &CACHE_INT_MAP

0x14c - NA

pub fn flash_mspi_int_map(&self) -> &FLASH_MSPI_INT_MAP

0x150 - NA

pub fn csi_bridge_int_map(&self) -> &CSI_BRIDGE_INT_MAP

0x154 - NA

pub fn dsi_bridge_int_map(&self) -> &DSI_BRIDGE_INT_MAP

0x158 - NA

pub fn csi_int_map(&self) -> &CSI_INT_MAP

0x15c - NA

pub fn dsi_int_map(&self) -> &DSI_INT_MAP

0x160 - NA

pub fn gmii_phy_int_map(&self) -> &GMII_PHY_INT_MAP

0x164 - NA

pub fn lpi_int_map(&self) -> &LPI_INT_MAP

0x168 - NA

pub fn pmt_int_map(&self) -> &PMT_INT_MAP

0x16c - NA

pub fn sbd_int_map(&self) -> &SBD_INT_MAP

0x170 - NA

pub fn usb_otg_int_map(&self) -> &USB_OTG_INT_MAP

0x174 - NA

pub fn usb_otg_endp_multi_proc_int_map( &self, ) -> &USB_OTG_ENDP_MULTI_PROC_INT_MAP

0x178 - NA

pub fn jpeg_int_map(&self) -> &JPEG_INT_MAP

0x17c - NA

pub fn ppa_int_map(&self) -> &PPA_INT_MAP

0x180 - NA

pub fn core0_trace_int_map(&self) -> &CORE0_TRACE_INT_MAP

0x184 - NA

pub fn core1_trace_int_map(&self) -> &CORE1_TRACE_INT_MAP

0x188 - NA

pub fn hp_core_ctrl_int_map(&self) -> &HP_CORE_CTRL_INT_MAP

0x18c - NA

pub fn isp_int_map(&self) -> &ISP_INT_MAP

0x190 - NA

pub fn i3c_mst_int_map(&self) -> &I3C_MST_INT_MAP

0x194 - NA

pub fn i3c_slv_int_map(&self) -> &I3C_SLV_INT_MAP

0x198 - NA

pub fn usb_otg11_int_map(&self) -> &USB_OTG11_INT_MAP

0x19c - NA

pub fn dma2d_in_ch0_int_map(&self) -> &DMA2D_IN_CH0_INT_MAP

0x1a0 - NA

pub fn dma2d_in_ch1_int_map(&self) -> &DMA2D_IN_CH1_INT_MAP

0x1a4 - NA

pub fn dma2d_out_ch0_int_map(&self) -> &DMA2D_OUT_CH0_INT_MAP

0x1a8 - NA

pub fn dma2d_out_ch1_int_map(&self) -> &DMA2D_OUT_CH1_INT_MAP

0x1ac - NA

pub fn dma2d_out_ch2_int_map(&self) -> &DMA2D_OUT_CH2_INT_MAP

0x1b0 - NA

pub fn psram_mspi_int_map(&self) -> &PSRAM_MSPI_INT_MAP

0x1b4 - NA

pub fn hp_sysreg_int_map(&self) -> &HP_SYSREG_INT_MAP

0x1b8 - NA

pub fn pcnt_int_map(&self) -> &PCNT_INT_MAP

0x1bc - NA

pub fn hp_pau_int_map(&self) -> &HP_PAU_INT_MAP

0x1c0 - NA

pub fn hp_parlio_rx_int_map(&self) -> &HP_PARLIO_RX_INT_MAP

0x1c4 - NA

pub fn hp_parlio_tx_int_map(&self) -> &HP_PARLIO_TX_INT_MAP

0x1c8 - NA

pub fn h264_dma2d_out_ch0_int_map(&self) -> &H264_DMA2D_OUT_CH0_INT_MAP

0x1cc - NA

pub fn h264_dma2d_out_ch1_int_map(&self) -> &H264_DMA2D_OUT_CH1_INT_MAP

0x1d0 - NA

pub fn h264_dma2d_out_ch2_int_map(&self) -> &H264_DMA2D_OUT_CH2_INT_MAP

0x1d4 - NA

pub fn h264_dma2d_out_ch3_int_map(&self) -> &H264_DMA2D_OUT_CH3_INT_MAP

0x1d8 - NA

pub fn h264_dma2d_out_ch4_int_map(&self) -> &H264_DMA2D_OUT_CH4_INT_MAP

0x1dc - NA

pub fn h264_dma2d_in_ch0_int_map(&self) -> &H264_DMA2D_IN_CH0_INT_MAP

0x1e0 - NA

pub fn h264_dma2d_in_ch1_int_map(&self) -> &H264_DMA2D_IN_CH1_INT_MAP

0x1e4 - NA

pub fn h264_dma2d_in_ch2_int_map(&self) -> &H264_DMA2D_IN_CH2_INT_MAP

0x1e8 - NA

pub fn h264_dma2d_in_ch3_int_map(&self) -> &H264_DMA2D_IN_CH3_INT_MAP

0x1ec - NA

pub fn h264_dma2d_in_ch4_int_map(&self) -> &H264_DMA2D_IN_CH4_INT_MAP

0x1f0 - NA

pub fn h264_dma2d_in_ch5_int_map(&self) -> &H264_DMA2D_IN_CH5_INT_MAP

0x1f4 - NA

pub fn h264_reg_int_map(&self) -> &H264_REG_INT_MAP

0x1f8 - NA

pub fn assist_debug_int_map(&self) -> &ASSIST_DEBUG_INT_MAP

0x1fc - NA

pub fn intr_status_reg_0(&self) -> &INTR_STATUS_REG_0

0x200 - NA

pub fn intr_status_reg_1(&self) -> &INTR_STATUS_REG_1

0x204 - NA

pub fn intr_status_reg_2(&self) -> &INTR_STATUS_REG_2

0x208 - NA

pub fn intr_status_reg_3(&self) -> &INTR_STATUS_REG_3

0x20c - NA

pub fn clock_gate(&self) -> &CLOCK_GATE

0x210 - NA

pub fn interrupt_reg_date(&self) -> &INTERRUPT_REG_DATE

0x3fc - NA

Trait Implementations§

impl Debug for INTERRUPT_CORE1

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter. Read more

impl Deref for INTERRUPT_CORE1

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl Send for INTERRUPT_CORE1

Auto Trait Implementations§

impl Freeze for INTERRUPT_CORE1

impl RefUnwindSafe for INTERRUPT_CORE1

impl !Sync for INTERRUPT_CORE1

impl Unpin for INTERRUPT_CORE1

impl UnwindSafe for INTERRUPT_CORE1

Blanket Implementations§

impl<T> Any for T
where T: 'static + ?Sized,

fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more

impl<T> Borrow<T> for T
where T: ?Sized,

fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more

impl<T> BorrowMut<T> for T
where T: ?Sized,

fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more

impl<T> From<T> for T

fn from(t: T) -> T

Returns the argument unchanged.

impl<T, U> Into<U> for T
where U: From<T>,

fn into(self) -> U

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

impl<P, T> Receiver for P
where P: Deref<Target = T> + ?Sized, T: ?Sized,

type Target = T

🔬This is a nightly-only experimental API. (arbitrary_self_types)

The target type on which the method may be called.

impl<T, U> TryFrom<U> for T
where U: Into<T>,

type Error = Infallible

The type returned in the event of a conversion error.

fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.

impl<T, U> TryInto<U> for T
where U: TryFrom<T>,

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.

fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Performs the conversion.