Expand description
Remote Control
Modules§
- ch_
rx_ carrier_ rm - Channel %s carrier remove register
- ch_
rx_ lim - Channel %s Rx event configuration register
- ch_
tx_ lim - Channel %s Tx event configuration register
- chcarrier_
duty - Channel %s duty cycle configuration register
- date
- RMT version register
- int_clr
- Interrupt clear bits
- int_ena
- Interrupt enable bits
- int_raw
- Raw interrupt status
- int_st
- Masked interrupt status
- ref_
cnt_ rst - RMT clock divider reset register
- rx_
chconf0 - Channel %s configure register 0
- rx_
chconf1 - Channel %s configure register 1
- rx_
chdata - The read and write data register for CHANNEL$n by apb fifo access.
- rx_
chstatus - Channel %s status register
- sys_
conf - RMT apb configuration register
- tx_
chconf0 - Channel %s configure register 0
- tx_
chdata - The read and write data register for CHANNEL%s by apb fifo access.
- tx_
chstatus - Channel %s status register
- tx_sim
- RMT TX synchronous register
Structs§
- Register
Block - Register block
Type Aliases§
- CHCARRIER_
DUTY - CHCARRIER_DUTY (rw) register accessor: Channel %s duty cycle configuration register
- CH_
RX_ CARRIER_ RM - CH_RX_CARRIER_RM (rw) register accessor: Channel %s carrier remove register
- CH_
RX_ LIM - CH_RX_LIM (rw) register accessor: Channel %s Rx event configuration register
- CH_
TX_ LIM - CH_TX_LIM (rw) register accessor: Channel %s Tx event configuration register
- DATE
- DATE (rw) register accessor: RMT version register
- INT_CLR
- INT_CLR (w) register accessor: Interrupt clear bits
- INT_ENA
- INT_ENA (rw) register accessor: Interrupt enable bits
- INT_RAW
- INT_RAW (rw) register accessor: Raw interrupt status
- INT_ST
- INT_ST (r) register accessor: Masked interrupt status
- REF_
CNT_ RST - REF_CNT_RST (w) register accessor: RMT clock divider reset register
- RX_
CHCON F0 - RX_CHCONF0 (rw) register accessor: Channel %s configure register 0
- RX_
CHCON F1 - RX_CHCONF1 (rw) register accessor: Channel %s configure register 1
- RX_
CHDATA - RX_CHDATA (r) register accessor: The read and write data register for CHANNEL$n by apb fifo access.
- RX_
CHSTATUS - RX_CHSTATUS (r) register accessor: Channel %s status register
- SYS_
CONF - SYS_CONF (rw) register accessor: RMT apb configuration register
- TX_
CHCON F0 - TX_CHCONF0 (rw) register accessor: Channel %s configure register 0
- TX_
CHDATA - TX_CHDATA (r) register accessor: The read and write data register for CHANNEL%s by apb fifo access.
- TX_
CHSTATUS - TX_CHSTATUS (r) register accessor: Channel %s status register
- TX_SIM
- TX_SIM (rw) register accessor: RMT TX synchronous register