Struct esp32p4::AHB_DMA

pub struct AHB_DMA { /* private fields */ }

AHB_DMA Peripheral

Implementations

impl AHB_DMA

pub const PTR: *const RegisterBlock = {0x50085000 as *const ahb_dma::RegisterBlock}

Pointer to the register block

pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

pub unsafe fn steal() -> Self

Steal an instance of this peripheral

Safety

Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.

Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.

Methods from Deref<Target = RegisterBlock>

pub fn in_int_raw_ch(&self, n: usize) -> &IN_INT_RAW_CH

0x00..0x0c - Raw status interrupt of channel 0

pub fn in_int_raw_ch_iter(&self) -> impl Iterator<Item = &IN_INT_RAW_CH>

Iterator for array of: 0x00..0x0c - Raw status interrupt of channel 0

pub fn in_int_st_ch(&self, n: usize) -> &IN_INT_ST_CH

0x04..0x10 - Masked interrupt of channel 0

pub fn in_int_st_ch_iter(&self) -> impl Iterator<Item = &IN_INT_ST_CH>

Iterator for array of: 0x04..0x10 - Masked interrupt of channel 0

pub fn in_int_ena_ch(&self, n: usize) -> &IN_INT_ENA_CH

0x08..0x14 - Interrupt enable bits of channel 0

pub fn in_int_ena_ch_iter(&self) -> impl Iterator<Item = &IN_INT_ENA_CH>

Iterator for array of: 0x08..0x14 - Interrupt enable bits of channel 0

pub fn in_int_clr_ch(&self, n: usize) -> &IN_INT_CLR_CH

0x0c..0x18 - Interrupt clear bits of channel 0

pub fn in_int_clr_ch_iter(&self) -> impl Iterator<Item = &IN_INT_CLR_CH>

Iterator for array of: 0x0c..0x18 - Interrupt clear bits of channel 0

pub fn out_int_raw_ch(&self, n: usize) -> &OUT_INT_RAW_CH

0x30..0x3c - Raw status interrupt of channel 0

pub fn out_int_raw_ch_iter(&self) -> impl Iterator<Item = &OUT_INT_RAW_CH>

Iterator for array of: 0x30..0x3c - Raw status interrupt of channel 0

pub fn out_int_st_ch(&self, n: usize) -> &OUT_INT_ST_CH

0x34..0x40 - Masked interrupt of channel 0

pub fn out_int_st_ch_iter(&self) -> impl Iterator<Item = &OUT_INT_ST_CH>

Iterator for array of: 0x34..0x40 - Masked interrupt of channel 0

pub fn out_int_ena_ch(&self, n: usize) -> &OUT_INT_ENA_CH

0x38..0x44 - Interrupt enable bits of channel 0

pub fn out_int_ena_ch_iter(&self) -> impl Iterator<Item = &OUT_INT_ENA_CH>

Iterator for array of: 0x38..0x44 - Interrupt enable bits of channel 0

pub fn out_int_clr_ch(&self, n: usize) -> &OUT_INT_CLR_CH

0x3c..0x48 - Interrupt clear bits of channel 0

pub fn out_int_clr_ch_iter(&self) -> impl Iterator<Item = &OUT_INT_CLR_CH>

Iterator for array of: 0x3c..0x48 - Interrupt clear bits of channel 0

pub fn ahb_test(&self) -> &AHB_TEST

0x60 - reserved

pub fn misc_conf(&self) -> &MISC_CONF

0x64 - MISC register

pub fn date(&self) -> &DATE

0x68 - Version control register

pub fn in_conf0_ch(&self, n: usize) -> &IN_CONF0_CH

0x70..0x7c - Configure 0 register of Rx channel 0

pub fn in_conf0_ch_iter(&self) -> impl Iterator<Item = &IN_CONF0_CH>

Iterator for array of: 0x70..0x7c - Configure 0 register of Rx channel 0

pub fn in_conf1_ch(&self, n: usize) -> &IN_CONF1_CH

0x74..0x80 - Configure 1 register of Rx channel 0

pub fn in_conf1_ch_iter(&self) -> impl Iterator<Item = &IN_CONF1_CH>

Iterator for array of: 0x74..0x80 - Configure 1 register of Rx channel 0

pub fn infifo_status_ch(&self, n: usize) -> &INFIFO_STATUS_CH

0x78..0x84 - Receive FIFO status of Rx channel 0

pub fn infifo_status_ch_iter(&self) -> impl Iterator<Item = &INFIFO_STATUS_CH>

Iterator for array of: 0x78..0x84 - Receive FIFO status of Rx channel 0

pub fn in_pop_ch(&self, n: usize) -> &IN_POP_CH

0x7c..0x88 - Pop control register of Rx channel 0

pub fn in_pop_ch_iter(&self) -> impl Iterator<Item = &IN_POP_CH>

Iterator for array of: 0x7c..0x88 - Pop control register of Rx channel 0

pub fn in_link_ch(&self, n: usize) -> &IN_LINK_CH

0x80..0x8c - Link descriptor configure and control register of Rx channel 0

pub fn in_link_ch_iter(&self) -> impl Iterator<Item = &IN_LINK_CH>

Iterator for array of: 0x80..0x8c - Link descriptor configure and control register of Rx channel 0

pub fn in_state_ch(&self, n: usize) -> &IN_STATE_CH

0x84..0x90 - Receive status of Rx channel 0

pub fn in_state_ch_iter(&self) -> impl Iterator<Item = &IN_STATE_CH>

Iterator for array of: 0x84..0x90 - Receive status of Rx channel 0

pub fn in_suc_eof_des_addr_ch(&self, n: usize) -> &IN_SUC_EOF_DES_ADDR_CH

0x88..0x94 - Inlink descriptor address when EOF occurs of Rx channel 0

pub fn in_suc_eof_des_addr_ch_iter( &self ) -> impl Iterator<Item = &IN_SUC_EOF_DES_ADDR_CH>

Iterator for array of: 0x88..0x94 - Inlink descriptor address when EOF occurs of Rx channel 0

pub fn in_err_eof_des_addr_ch(&self, n: usize) -> &IN_ERR_EOF_DES_ADDR_CH

0x8c..0x98 - Inlink descriptor address when errors occur of Rx channel 0

pub fn in_err_eof_des_addr_ch_iter( &self ) -> impl Iterator<Item = &IN_ERR_EOF_DES_ADDR_CH>

Iterator for array of: 0x8c..0x98 - Inlink descriptor address when errors occur of Rx channel 0

pub fn in_dscr_ch(&self, n: usize) -> &IN_DSCR_CH

0x90..0x9c - Current inlink descriptor address of Rx channel 0

pub fn in_dscr_ch_iter(&self) -> impl Iterator<Item = &IN_DSCR_CH>

Iterator for array of: 0x90..0x9c - Current inlink descriptor address of Rx channel 0

pub fn in_dscr_bf0_ch(&self, n: usize) -> &IN_DSCR_BF0_CH

0x94..0xa0 - The last inlink descriptor address of Rx channel 0

pub fn in_dscr_bf0_ch_iter(&self) -> impl Iterator<Item = &IN_DSCR_BF0_CH>

Iterator for array of: 0x94..0xa0 - The last inlink descriptor address of Rx channel 0

pub fn in_dscr_bf1_ch(&self, n: usize) -> &IN_DSCR_BF1_CH

0x98..0xa4 - The second-to-last inlink descriptor address of Rx channel 0

pub fn in_dscr_bf1_ch_iter(&self) -> impl Iterator<Item = &IN_DSCR_BF1_CH>

Iterator for array of: 0x98..0xa4 - The second-to-last inlink descriptor address of Rx channel 0

pub fn in_pri_ch(&self, n: usize) -> &IN_PRI_CH

0x9c..0xa8 - Priority register of Rx channel 0

pub fn in_pri_ch_iter(&self) -> impl Iterator<Item = &IN_PRI_CH>

Iterator for array of: 0x9c..0xa8 - Priority register of Rx channel 0

pub fn in_peri_sel_ch(&self, n: usize) -> &IN_PERI_SEL_CH

0xa0..0xac - Peripheral selection of Rx channel 0

pub fn in_peri_sel_ch_iter(&self) -> impl Iterator<Item = &IN_PERI_SEL_CH>

Iterator for array of: 0xa0..0xac - Peripheral selection of Rx channel 0

pub fn out_conf0_ch0(&self) -> &OUT_CONF0_CH0

0xd0 - Configure 0 register of Tx channel 0

pub fn out_conf1_ch(&self, n: usize) -> &OUT_CONF1_CH

0xd4..0xe0 - Configure 1 register of Tx channel 0

pub fn out_conf1_ch_iter(&self) -> impl Iterator<Item = &OUT_CONF1_CH>

Iterator for array of: 0xd4..0xe0 - Configure 1 register of Tx channel 0

pub fn outfifo_status_ch(&self, n: usize) -> &OUTFIFO_STATUS_CH

0xd8..0xe4 - Transmit FIFO status of Tx channel 0

pub fn outfifo_status_ch_iter(&self) -> impl Iterator<Item = &OUTFIFO_STATUS_CH>

Iterator for array of: 0xd8..0xe4 - Transmit FIFO status of Tx channel 0

pub fn out_push_ch(&self, n: usize) -> &OUT_PUSH_CH

0xdc..0xe8 - Push control register of Rx channel 0

pub fn out_push_ch_iter(&self) -> impl Iterator<Item = &OUT_PUSH_CH>

Iterator for array of: 0xdc..0xe8 - Push control register of Rx channel 0

pub fn out_link_ch(&self, n: usize) -> &OUT_LINK_CH

0xe0..0xec - Link descriptor configure and control register of Tx channel 0

pub fn out_link_ch_iter(&self) -> impl Iterator<Item = &OUT_LINK_CH>

Iterator for array of: 0xe0..0xec - Link descriptor configure and control register of Tx channel 0

pub fn out_state_ch(&self, n: usize) -> &OUT_STATE_CH

0xe4..0xf0 - Transmit status of Tx channel 0

pub fn out_state_ch_iter(&self) -> impl Iterator<Item = &OUT_STATE_CH>

Iterator for array of: 0xe4..0xf0 - Transmit status of Tx channel 0

pub fn out_eof_des_addr_ch(&self, n: usize) -> &OUT_EOF_DES_ADDR_CH

0xe8..0xf4 - Outlink descriptor address when EOF occurs of Tx channel 0

pub fn out_eof_des_addr_ch_iter( &self ) -> impl Iterator<Item = &OUT_EOF_DES_ADDR_CH>

Iterator for array of: 0xe8..0xf4 - Outlink descriptor address when EOF occurs of Tx channel 0

pub fn out_eof_bfr_des_addr_ch(&self, n: usize) -> &OUT_EOF_BFR_DES_ADDR_CH

0xec..0xf8 - The last outlink descriptor address when EOF occurs of Tx channel 0

pub fn out_eof_bfr_des_addr_ch_iter( &self ) -> impl Iterator<Item = &OUT_EOF_BFR_DES_ADDR_CH>

Iterator for array of: 0xec..0xf8 - The last outlink descriptor address when EOF occurs of Tx channel 0

pub fn out_dscr_ch(&self, n: usize) -> &OUT_DSCR_CH

0xf0..0xfc - Current inlink descriptor address of Tx channel 0

pub fn out_dscr_ch_iter(&self) -> impl Iterator<Item = &OUT_DSCR_CH>

Iterator for array of: 0xf0..0xfc - Current inlink descriptor address of Tx channel 0

pub fn out_dscr_bf0_ch(&self, n: usize) -> &OUT_DSCR_BF0_CH

0xf4..0x100 - The last inlink descriptor address of Tx channel 0

pub fn out_dscr_bf0_ch_iter(&self) -> impl Iterator<Item = &OUT_DSCR_BF0_CH>

Iterator for array of: 0xf4..0x100 - The last inlink descriptor address of Tx channel 0

pub fn out_dscr_bf1_ch(&self, n: usize) -> &OUT_DSCR_BF1_CH

0xf8..0x104 - The second-to-last inlink descriptor address of Tx channel 0

pub fn out_dscr_bf1_ch_iter(&self) -> impl Iterator<Item = &OUT_DSCR_BF1_CH>

Iterator for array of: 0xf8..0x104 - The second-to-last inlink descriptor address of Tx channel 0

pub fn out_pri_ch(&self, n: usize) -> &OUT_PRI_CH

0xfc..0x108 - Priority register of Tx channel 0.

pub fn out_pri_ch_iter(&self) -> impl Iterator<Item = &OUT_PRI_CH>

Iterator for array of: 0xfc..0x108 - Priority register of Tx channel 0.

pub fn out_peri_sel_ch(&self, n: usize) -> &OUT_PERI_SEL_CH

0x100..0x10c - Peripheral selection of Tx channel 0

pub fn out_peri_sel_ch_iter(&self) -> impl Iterator<Item = &OUT_PERI_SEL_CH>

Iterator for array of: 0x100..0x10c - Peripheral selection of Tx channel 0

pub fn out_conf0_ch(&self, n: usize) -> &OUT_CONF0_CH

0x190..0x198 - Configure 0 register of Tx channel 1

pub fn out_conf0_ch_iter(&self) -> impl Iterator<Item = &OUT_CONF0_CH>

Iterator for array of: 0x190..0x198 - Configure 0 register of Tx channel 1

pub fn out_crc_init_data_ch(&self, n: usize) -> &OUT_CRC_INIT_DATA_CH

0x2bc..0x2c8 - This register is used to config ch0 crc initial data(max 32 bit)

pub fn out_crc_init_data_ch_iter( &self ) -> impl Iterator<Item = &OUT_CRC_INIT_DATA_CH>

Iterator for array of: 0x2bc..0x2c8 - This register is used to config ch0 crc initial data(max 32 bit)

pub fn tx_crc_width_ch(&self, n: usize) -> &TX_CRC_WIDTH_CH

0x2c0..0x2cc - This register is used to confiig tx ch0 crc result width,2’b00 mean crc_width <=8bit,2’b01 8<crc_width<=16 ,2’b10 mean 16<crc_width <=24,2’b11 mean 24<crc_width<=32

pub fn tx_crc_width_ch_iter(&self) -> impl Iterator<Item = &TX_CRC_WIDTH_CH>

Iterator for array of: 0x2c0..0x2cc - This register is used to confiig tx ch0 crc result width,2’b00 mean crc_width <=8bit,2’b01 8<crc_width<=16 ,2’b10 mean 16<crc_width <=24,2’b11 mean 24<crc_width<=32

pub fn out_crc_clear_ch(&self, n: usize) -> &OUT_CRC_CLEAR_CH

0x2c4..0x2d0 - This register is used to clear ch0 crc result

pub fn out_crc_clear_ch_iter(&self) -> impl Iterator<Item = &OUT_CRC_CLEAR_CH>

Iterator for array of: 0x2c4..0x2d0 - This register is used to clear ch0 crc result

pub fn out_crc_final_result_ch(&self, n: usize) -> &OUT_CRC_FINAL_RESULT_CH

0x2c8..0x2d4 - This register is used to store ch0 crc result

pub fn out_crc_final_result_ch_iter( &self ) -> impl Iterator<Item = &OUT_CRC_FINAL_RESULT_CH>

Iterator for array of: 0x2c8..0x2d4 - This register is used to store ch0 crc result

pub fn tx_crc_en_wr_data_ch(&self, n: usize) -> &TX_CRC_EN_WR_DATA_CH

0x2cc..0x2d8 - This resister is used to config ch0 crc en for every bit

pub fn tx_crc_en_wr_data_ch_iter( &self ) -> impl Iterator<Item = &TX_CRC_EN_WR_DATA_CH>

Iterator for array of: 0x2cc..0x2d8 - This resister is used to config ch0 crc en for every bit

pub fn tx_crc_en_addr_ch(&self, n: usize) -> &TX_CRC_EN_ADDR_CH

0x2d0..0x2dc - This register is used to config ch0 crc en addr

pub fn tx_crc_en_addr_ch_iter(&self) -> impl Iterator<Item = &TX_CRC_EN_ADDR_CH>

Iterator for array of: 0x2d0..0x2dc - This register is used to config ch0 crc en addr

pub fn tx_crc_data_en_wr_data_ch(&self, n: usize) -> &TX_CRC_DATA_EN_WR_DATA_CH

0x2d4..0x2e0 - This register is used to config crc data_8bit en

pub fn tx_crc_data_en_wr_data_ch_iter( &self ) -> impl Iterator<Item = &TX_CRC_DATA_EN_WR_DATA_CH>

Iterator for array of: 0x2d4..0x2e0 - This register is used to config crc data_8bit en

pub fn tx_crc_data_en_addr_ch(&self, n: usize) -> &TX_CRC_DATA_EN_ADDR_CH

0x2d8..0x2e4 - This register is used to config addr of crc data_8bit en

pub fn tx_crc_data_en_addr_ch_iter( &self ) -> impl Iterator<Item = &TX_CRC_DATA_EN_ADDR_CH>

Iterator for array of: 0x2d8..0x2e4 - This register is used to config addr of crc data_8bit en

pub fn tx_ch_arb_weigh_ch(&self, n: usize) -> &TX_CH_ARB_WEIGH_CH

0x2dc..0x2e8 - This register is used to config ch0 arbiter weigh

pub fn tx_ch_arb_weigh_ch_iter( &self ) -> impl Iterator<Item = &TX_CH_ARB_WEIGH_CH>

Iterator for array of: 0x2dc..0x2e8 - This register is used to config ch0 arbiter weigh

pub fn tx_arb_weigh_opt_dir_ch(&self, n: usize) -> &TX_ARB_WEIGH_OPT_DIR_CH

0x2e0..0x2ec - This register is used to config off or on weigh optimization

pub fn tx_arb_weigh_opt_dir_ch_iter( &self ) -> impl Iterator<Item = &TX_ARB_WEIGH_OPT_DIR_CH>

Iterator for array of: 0x2e0..0x2ec - This register is used to config off or on weigh optimization

pub fn in_crc_init_data_ch(&self, n: usize) -> &IN_CRC_INIT_DATA_CH

0x334..0x340 - This register is used to config ch0 crc initial data(max 32 bit)

pub fn in_crc_init_data_ch_iter( &self ) -> impl Iterator<Item = &IN_CRC_INIT_DATA_CH>

Iterator for array of: 0x334..0x340 - This register is used to config ch0 crc initial data(max 32 bit)

pub fn rx_crc_width_ch(&self, n: usize) -> &RX_CRC_WIDTH_CH

0x338..0x344 - This register is used to confiig rx ch0 crc result width,2’b00 mean crc_width <=8bit,2’b01 8<crc_width<=16 ,2’b10 mean 16<crc_width <=24,2’b11 mean 24<crc_width<=32

pub fn rx_crc_width_ch_iter(&self) -> impl Iterator<Item = &RX_CRC_WIDTH_CH>

Iterator for array of: 0x338..0x344 - This register is used to confiig rx ch0 crc result width,2’b00 mean crc_width <=8bit,2’b01 8<crc_width<=16 ,2’b10 mean 16<crc_width <=24,2’b11 mean 24<crc_width<=32

pub fn in_crc_clear_ch(&self, n: usize) -> &IN_CRC_CLEAR_CH

0x33c..0x348 - This register is used to clear ch0 crc result

pub fn in_crc_clear_ch_iter(&self) -> impl Iterator<Item = &IN_CRC_CLEAR_CH>

Iterator for array of: 0x33c..0x348 - This register is used to clear ch0 crc result

pub fn in_crc_final_result_ch(&self, n: usize) -> &IN_CRC_FINAL_RESULT_CH

0x340..0x34c - This register is used to store ch0 crc result

pub fn in_crc_final_result_ch_iter( &self ) -> impl Iterator<Item = &IN_CRC_FINAL_RESULT_CH>

Iterator for array of: 0x340..0x34c - This register is used to store ch0 crc result

pub fn rx_crc_en_wr_data_ch(&self, n: usize) -> &RX_CRC_EN_WR_DATA_CH

0x344..0x350 - This resister is used to config ch0 crc en for every bit

pub fn rx_crc_en_wr_data_ch_iter( &self ) -> impl Iterator<Item = &RX_CRC_EN_WR_DATA_CH>

Iterator for array of: 0x344..0x350 - This resister is used to config ch0 crc en for every bit

pub fn rx_crc_en_addr_ch(&self, n: usize) -> &RX_CRC_EN_ADDR_CH

0x348..0x354 - This register is used to config ch0 crc en addr

pub fn rx_crc_en_addr_ch_iter(&self) -> impl Iterator<Item = &RX_CRC_EN_ADDR_CH>

Iterator for array of: 0x348..0x354 - This register is used to config ch0 crc en addr

pub fn rx_crc_data_en_wr_data_ch(&self, n: usize) -> &RX_CRC_DATA_EN_WR_DATA_CH

0x34c..0x358 - This register is used to config crc data_8bit en

pub fn rx_crc_data_en_wr_data_ch_iter( &self ) -> impl Iterator<Item = &RX_CRC_DATA_EN_WR_DATA_CH>

Iterator for array of: 0x34c..0x358 - This register is used to config crc data_8bit en

pub fn rx_crc_data_en_addr_ch(&self, n: usize) -> &RX_CRC_DATA_EN_ADDR_CH

0x350..0x35c - This register is used to config addr of crc data_8bit en

pub fn rx_crc_data_en_addr_ch_iter( &self ) -> impl Iterator<Item = &RX_CRC_DATA_EN_ADDR_CH>

Iterator for array of: 0x350..0x35c - This register is used to config addr of crc data_8bit en

pub fn rx_ch_arb_weigh_ch(&self, n: usize) -> &RX_CH_ARB_WEIGH_CH

0x354..0x360 - This register is used to config ch0 arbiter weigh

pub fn rx_ch_arb_weigh_ch_iter( &self ) -> impl Iterator<Item = &RX_CH_ARB_WEIGH_CH>

Iterator for array of: 0x354..0x360 - This register is used to config ch0 arbiter weigh

pub fn rx_arb_weigh_opt_dir_ch(&self, n: usize) -> &RX_ARB_WEIGH_OPT_DIR_CH

0x358..0x364 - This register is used to config off or on weigh optimization

pub fn rx_arb_weigh_opt_dir_ch_iter( &self ) -> impl Iterator<Item = &RX_ARB_WEIGH_OPT_DIR_CH>

Iterator for array of: 0x358..0x364 - This register is used to config off or on weigh optimization

pub fn in_link_addr_ch(&self, n: usize) -> &IN_LINK_ADDR_CH

0x3ac..0x3b8 - Link descriptor configure of Rx channel 0

pub fn in_link_addr_ch_iter(&self) -> impl Iterator<Item = &IN_LINK_ADDR_CH>

Iterator for array of: 0x3ac..0x3b8 - Link descriptor configure of Rx channel 0

pub fn out_link_addr_ch(&self, n: usize) -> &OUT_LINK_ADDR_CH

0x3b8..0x3c4 - Link descriptor configure of Tx channel 0

pub fn out_link_addr_ch_iter(&self) -> impl Iterator<Item = &OUT_LINK_ADDR_CH>

Iterator for array of: 0x3b8..0x3c4 - Link descriptor configure of Tx channel 0

pub fn intr_mem_start_addr(&self) -> &INTR_MEM_START_ADDR

0x3c4 - The start address of accessible address space.

pub fn intr_mem_end_addr(&self) -> &INTR_MEM_END_ADDR

0x3c8 - The end address of accessible address space. The access address beyond this range would lead to descriptor error.

pub fn arb_timeout_tx(&self) -> &ARB_TIMEOUT_TX

0x3cc - This retister is used to config arbiter time slice for tx dir

pub fn arb_timeout_rx(&self) -> &ARB_TIMEOUT_RX

0x3d0 - This retister is used to config arbiter time slice for rx dir

pub fn weight_en_tx(&self) -> &WEIGHT_EN_TX

0x3d4 - This register is used to config arbiter weigh function to on or off for tx dir

pub fn weight_en_rx(&self) -> &WEIGHT_EN_RX

0x3d8 - This register is used to config arbiter weigh function to on or off for rx dir

Trait Implementations

impl Debug for AHB_DMA

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Deref for AHB_DMA

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl Send for AHB_DMA