Module int_st

Masked interrupt status

Structs

INT_ST_SPEC

Masked interrupt status

Type Aliases

CAP0_R

Field CAP0 reader - The masked status bit for the interrupt triggered by capture on channel 0.

CAP1_R

Field CAP1 reader - The masked status bit for the interrupt triggered by capture on channel 1.

CAP2_R

Field CAP2 reader - The masked status bit for the interrupt triggered by capture on channel 2.

CMPR0_TEA_R

Field CMPR0_TEA reader - The masked status bit for the interrupt triggered by a PWM operator 0 TEA event

CMPR0_TEB_R

Field CMPR0_TEB reader - The masked status bit for the interrupt triggered by a PWM operator 0 TEB event

CMPR1_TEA_R

Field CMPR1_TEA reader - The masked status bit for the interrupt triggered by a PWM operator 1 TEA event

CMPR1_TEB_R

Field CMPR1_TEB reader - The masked status bit for the interrupt triggered by a PWM operator 1 TEB event

CMPR2_TEA_R

Field CMPR2_TEA reader - The masked status bit for the interrupt triggered by a PWM operator 2 TEA event

CMPR2_TEB_R

Field CMPR2_TEB reader - The masked status bit for the interrupt triggered by a PWM operator 2 TEB event

FAULT0_CLR_R

Field FAULT0_CLR reader - The masked status bit for the interrupt triggered when event_f0 ends.

FAULT0_R

Field FAULT0 reader - The masked status bit for the interrupt triggered when event_f0 starts.

FAULT1_CLR_R

Field FAULT1_CLR reader - The masked status bit for the interrupt triggered when event_f1 ends.

FAULT1_R

Field FAULT1 reader - The masked status bit for the interrupt triggered when event_f1 starts.

FAULT2_CLR_R

Field FAULT2_CLR reader - The masked status bit for the interrupt triggered when event_f2 ends.

FAULT2_R

Field FAULT2 reader - The masked status bit for the interrupt triggered when event_f2 starts.

R

Register INT_ST reader

TIMER0_STOP_R

Field TIMER0_STOP reader - The masked status bit for the interrupt triggered when the timer 0 stops.

TIMER0_TEP_R

Field TIMER0_TEP reader - The masked status bit for the interrupt triggered by a PWM timer 0 TEP event.

TIMER0_TEZ_R

Field TIMER0_TEZ reader - The masked status bit for the interrupt triggered by a PWM timer 0 TEZ event.

TIMER1_STOP_R

Field TIMER1_STOP reader - The masked status bit for the interrupt triggered when the timer 1 stops.

TIMER1_TEP_R

Field TIMER1_TEP reader - The masked status bit for the interrupt triggered by a PWM timer 1 TEP event.

TIMER1_TEZ_R

Field TIMER1_TEZ reader - The masked status bit for the interrupt triggered by a PWM timer 1 TEZ event.

TIMER2_STOP_R

Field TIMER2_STOP reader - The masked status bit for the interrupt triggered when the timer 2 stops.

TIMER2_TEP_R

Field TIMER2_TEP reader - The masked status bit for the interrupt triggered by a PWM timer 2 TEP event.

TIMER2_TEZ_R

Field TIMER2_TEZ reader - The masked status bit for the interrupt triggered by a PWM timer 2 TEZ event.

TZ0_CBC_R

Field TZ0_CBC reader - The masked status bit for the interrupt triggered by a cycle-by-cycle mode action on PWM0.

TZ0_OST_R

Field TZ0_OST reader - The masked status bit for the interrupt triggered by a one-shot mode action on PWM0.

TZ1_CBC_R

Field TZ1_CBC reader - The masked status bit for the interrupt triggered by a cycle-by-cycle mode action on PWM1.

TZ1_OST_R

Field TZ1_OST reader - The masked status bit for the interrupt triggered by a one-shot mode action on PWM1.

TZ2_CBC_R

Field TZ2_CBC reader - The masked status bit for the interrupt triggered by a cycle-by-cycle mode action on PWM2.

TZ2_OST_R

Field TZ2_OST reader - The masked status bit for the interrupt triggered by a one-shot mode action on PWM2.