Crate esp32h2

Source
Expand description

Peripheral access API for ESP32-H2 microcontrollers (generated using svd2rust v0.35.0 ( ))

You can find an overview of the generated API here.

API features to be included in the next svd2rust release can be generated by cloning the svd2rust repository, checking out the above commit, and running cargo doc --open.

Re-exports§

pub use self::i2c0 as i2c1;
pub use self::timg0 as timg1;
pub use self::uart0 as uart1;

Modules§

aes
AES (Advanced Encryption Standard) Accelerator
apb_saradc
SAR (Successive Approximation Register) Analog-to-Digital Converter
assist_debug
Debug Assist
clint
Core Local Interrupts
dma
DMA (Direct Memory Access) Controller
ds
Digital Signature
ecc
ECC (ECC Hardware Accelerator)
efuse
eFuse Controller
generic
Common register and bit access and modify traits
gpio
General Purpose Input/Output
gpio_sd
Sigma-Delta Modulation
hmac
HMAC (Hash-based Message Authentication Code) Accelerator
hp_apm
HP_APM Peripheral
hp_sys
High-Power System
i2c0
I2C (Inter-Integrated Circuit) Controller 0
i2c_ana_mst
I2C_ANA_MST Peripheral
i2s0
I2S (Inter-IC Sound) Controller 0
ieee802154
IEEE802154 Peripheral
interrupt_core0
Interrupt Controller (Core 0)
intpri
INTPRI Peripheral
io_mux
Input/Output Multiplexer
ledc
LED Control PWM (Pulse Width Modulation)
lp_ana
LP_ANA Peripheral
lp_aon
LP_AON Peripheral
lp_apm
Low-power Access Permission Management Controller
lp_apm0
LP_APM0 Peripheral
lp_clkrst
LP_CLKRST Peripheral
lp_peri
LP_PERI Peripheral
lp_timer
Low-power Timer
lp_wdt
Low-power Watchdog Timer
mcpwm0
Motor Control Pulse-Width Modulation 0
mem_monitor
MEM_MONITOR Peripheral
modem_lpcon
MODEM_LPCON Peripheral
modem_syscon
MODEM_SYSCON Peripheral
otp_debug
OTP_DEBUG Peripheral
parl_io
Parallel IO Controller
pau
PAU Peripheral
pcnt
Pulse Count Controller
pcr
PCR Peripheral
plic_mx
PLIC Peripheral
plic_ux
PLIC Peripheral
pmu
PMU Peripheral
rmt
Remote Control
rng
Hardware Random Number Generator
rsa
RSA (Rivest Shamir Adleman) Accelerator
sha
SHA (Secure Hash Algorithm) Accelerator
soc_etm
Event Task Matrix
spi0
SPI (Serial Peripheral Interface) Controller 0
spi1
SPI (Serial Peripheral Interface) Controller 1
spi2
SPI (Serial Peripheral Interface) Controller 2
systimer
System Timer
tee
TEE Peripheral
timg0
Timer Group 0
trace
RISC-V Trace Encoder
twai0
Two-Wire Automotive Interface
uart0
UART (Universal Asynchronous Receiver-Transmitter) Controller 0
uhci0
Universal Host Controller Interface 0
usb_device
Full-speed USB Serial/JTAG Controller

Structs§

AES
AES (Advanced Encryption Standard) Accelerator
APB_SARADC
SAR (Successive Approximation Register) Analog-to-Digital Converter
ASSIST_DEBUG
Debug Assist
CLINT
Core Local Interrupts
DMA
DMA (Direct Memory Access) Controller
DS
Digital Signature
ECC
ECC (ECC Hardware Accelerator)
EFUSE
eFuse Controller
GPIO
General Purpose Input/Output
GPIO_SD
Sigma-Delta Modulation
HMAC
HMAC (Hash-based Message Authentication Code) Accelerator
HP_APM
HP_APM Peripheral
HP_SYS
High-Power System
I2C0
I2C (Inter-Integrated Circuit) Controller 0
I2C1
I2C (Inter-Integrated Circuit) Controller 1
I2C_ANA_MST
I2C_ANA_MST Peripheral
I2S0
I2S (Inter-IC Sound) Controller 0
IEEE802154
IEEE802154 Peripheral
INTERRUPT_CORE0
Interrupt Controller (Core 0)
INTPRI
INTPRI Peripheral
IO_MUX
Input/Output Multiplexer
LEDC
LED Control PWM (Pulse Width Modulation)
LP_ANA
LP_ANA Peripheral
LP_AON
LP_AON Peripheral
LP_APM
Low-power Access Permission Management Controller
LP_APM0
LP_APM0 Peripheral
LP_CLKRST
LP_CLKRST Peripheral
LP_PERI
LP_PERI Peripheral
LP_TIMER
Low-power Timer
LP_WDT
Low-power Watchdog Timer
MCPWM0
Motor Control Pulse-Width Modulation 0
MEM_MONITOR
MEM_MONITOR Peripheral
MODEM_LPCON
MODEM_LPCON Peripheral
MODEM_SYSCON
MODEM_SYSCON Peripheral
OTP_DEBUG
OTP_DEBUG Peripheral
PARL_IO
Parallel IO Controller
PAU
PAU Peripheral
PCNT
Pulse Count Controller
PCR
PCR Peripheral
PLIC_MX
PLIC Peripheral
PLIC_UX
PLIC Peripheral
PMU
PMU Peripheral
Peripherals
All the peripherals.
RMT
Remote Control
RNG
Hardware Random Number Generator
RSA
RSA (Rivest Shamir Adleman) Accelerator
SHA
SHA (Secure Hash Algorithm) Accelerator
SOC_ETM
Event Task Matrix
SPI0
SPI (Serial Peripheral Interface) Controller 0
SPI1
SPI (Serial Peripheral Interface) Controller 1
SPI2
SPI (Serial Peripheral Interface) Controller 2
SYSTIMER
System Timer
TEE
TEE Peripheral
TIMG0
Timer Group 0
TIMG1
Timer Group 1
TRACE
RISC-V Trace Encoder
TWAI0
Two-Wire Automotive Interface
UART0
UART (Universal Asynchronous Receiver-Transmitter) Controller 0
UART1
UART (Universal Asynchronous Receiver-Transmitter) Controller 1
UHCI0
Universal Host Controller Interface 0
USB_DEVICE
Full-speed USB Serial/JTAG Controller

Enums§

Interrupt
Enumeration of all the interrupts.

Constants§

NVIC_PRIO_BITS
Number available in the NVIC for configuring priority