Module esp32h2::pcr::mspi_clk_conf

MSPI_CLK configuration register

Structs

• MSPI_CLK_CONF_SPEC
  MSPI_CLK configuration register

Type Aliases

• MSPI_FAST_DIV_NUM_R
  Field MSPI_FAST_DIV_NUM reader - Set as one within (0,1,2) to generate div1(default)/div2/div4 of low-speed clock-source to drive clk_mspi_fast. Only avaiable whe the clck-source is a low-speed clock-source such as XTAL/FOSC.
• MSPI_FAST_DIV_NUM_W
  Field MSPI_FAST_DIV_NUM writer - Set as one within (0,1,2) to generate div1(default)/div2/div4 of low-speed clock-source to drive clk_mspi_fast. Only avaiable whe the clck-source is a low-speed clock-source such as XTAL/FOSC.
• R
  Register MSPI_CLK_CONF reader
• W
  Register MSPI_CLK_CONF writer