Struct esp32h2::MCPWM0

pub struct MCPWM0 { /* private fields */ }

Motor Control Pulse-Width Modulation 0

Implementations

impl MCPWM0

pub const PTR: *const RegisterBlock = {0x60014000 as *const mcpwm0::RegisterBlock}

Pointer to the register block

pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

pub unsafe fn steal() -> Self

Steal an instance of this peripheral

Safety

Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.

Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.

Methods from Deref<Target = RegisterBlock>

pub fn clk_cfg(&self) -> &CLK_CFG

0x00 - PWM clock prescaler register.

pub fn timer0_cfg0(&self) -> &TIMER0_CFG0

0x04 - PWM timer0 period and update method configuration register.

pub fn timer0_cfg1(&self) -> &TIMER0_CFG1

0x08 - PWM timer0 working mode and start/stop control configuration register.

pub fn timer0_sync(&self) -> &TIMER0_SYNC

0x0c - PWM timer0 sync function configuration register.

pub fn timer0_status(&self) -> &TIMER0_STATUS

0x10 - PWM timer0 status register.

pub fn timer1_cfg0(&self) -> &TIMER1_CFG0

0x14 - PWM timer1 period and update method configuration register.

pub fn timer1_cfg1(&self) -> &TIMER1_CFG1

0x18 - PWM timer1 working mode and start/stop control configuration register.

pub fn timer1_sync(&self) -> &TIMER1_SYNC

0x1c - PWM timer1 sync function configuration register.

pub fn timer1_status(&self) -> &TIMER1_STATUS

0x20 - PWM timer1 status register.

pub fn timer2_cfg0(&self) -> &TIMER2_CFG0

0x24 - PWM timer2 period and update method configuration register.

pub fn timer2_cfg1(&self) -> &TIMER2_CFG1

0x28 - PWM timer2 working mode and start/stop control configuration register.

pub fn timer2_sync(&self) -> &TIMER2_SYNC

0x2c - PWM timer2 sync function configuration register.

pub fn timer2_status(&self) -> &TIMER2_STATUS

0x30 - PWM timer2 status register.

pub fn timer_synci_cfg(&self) -> &TIMER_SYNCI_CFG

0x34 - Synchronization input selection for three PWM timers.

pub fn operator_timersel(&self) -> &OPERATOR_TIMERSEL

0x38 - Select specific timer for PWM operators.

pub fn gen0_stmp_cfg(&self) -> &GEN0_STMP_CFG

0x3c - Transfer status and update method for time stamp registers A and B

pub fn gen0_tstmp_a(&self) -> &GEN0_TSTMP_A

0x40 - Shadow register for register A.

pub fn gen0_tstmp_b(&self) -> &GEN0_TSTMP_B

0x44 - Shadow register for register B.

pub fn gen0_cfg0(&self) -> &GEN0_CFG0

0x48 - Fault event T0 and T1 handling

pub fn gen0_force(&self) -> &GEN0_FORCE

0x4c - Permissives to force PWM0A and PWM0B outputs by software

pub fn gen0_a(&self) -> &GEN0_A

0x50 - Actions triggered by events on PWM0A

pub fn gen0_b(&self) -> &GEN0_B

0x54 - Actions triggered by events on PWM0B

pub fn dt0_cfg(&self) -> &DT0_CFG

0x58 - dead time type selection and configuration

pub fn dt0_fed_cfg(&self) -> &DT0_FED_CFG

0x5c - Shadow register for falling edge delay (FED).

pub fn dt0_red_cfg(&self) -> &DT0_RED_CFG

0x60 - Shadow register for rising edge delay (RED).

pub fn carrier0_cfg(&self) -> &CARRIER0_CFG

0x64 - Carrier enable and configuratoin

pub fn fh0_cfg0(&self) -> &FH0_CFG0

0x68 - Actions on PWM0A and PWM0B trip events

pub fn fh0_cfg1(&self) -> &FH0_CFG1

0x6c - Software triggers for fault handler actions

pub fn fh0_status(&self) -> &FH0_STATUS

0x70 - Status of fault events.

pub fn gen1_stmp_cfg(&self) -> &GEN1_STMP_CFG

0x74 - Transfer status and update method for time stamp registers A and B

pub fn gen1_tstmp_a(&self) -> &GEN1_TSTMP_A

0x78 - Shadow register for register A.

pub fn gen1_tstmp_b(&self) -> &GEN1_TSTMP_B

0x7c - Shadow register for register B.

pub fn gen1_cfg0(&self) -> &GEN1_CFG0

0x80 - Fault event T0 and T1 handling

pub fn gen1_force(&self) -> &GEN1_FORCE

0x84 - Permissives to force PWM1A and PWM1B outputs by software

pub fn gen1_a(&self) -> &GEN1_A

0x88 - Actions triggered by events on PWM1A

pub fn gen1_b(&self) -> &GEN1_B

0x8c - Actions triggered by events on PWM1B

pub fn dt1_cfg(&self) -> &DT1_CFG

0x90 - dead time type selection and configuration

pub fn dt1_fed_cfg(&self) -> &DT1_FED_CFG

0x94 - Shadow register for falling edge delay (FED).

pub fn dt1_red_cfg(&self) -> &DT1_RED_CFG

0x98 - Shadow register for rising edge delay (RED).

pub fn carrier1_cfg(&self) -> &CARRIER1_CFG

0x9c - Carrier enable and configuratoin

pub fn fh1_cfg0(&self) -> &FH1_CFG0

0xa0 - Actions on PWM1A and PWM1B trip events

pub fn fh1_cfg1(&self) -> &FH1_CFG1

0xa4 - Software triggers for fault handler actions

pub fn fh1_status(&self) -> &FH1_STATUS

0xa8 - Status of fault events.

pub fn gen2_stmp_cfg(&self) -> &GEN2_STMP_CFG

0xac - Transfer status and update method for time stamp registers A and B

pub fn gen2_tstmp_a(&self) -> &GEN2_TSTMP_A

0xb0 - Shadow register for register A.

pub fn gen2_tstmp_b(&self) -> &GEN2_TSTMP_B

0xb4 - Shadow register for register B.

pub fn gen2_cfg0(&self) -> &GEN2_CFG0

0xb8 - Fault event T0 and T1 handling

pub fn gen2_force(&self) -> &GEN2_FORCE

0xbc - Permissives to force PWM2A and PWM2B outputs by software

pub fn gen2_a(&self) -> &GEN2_A

0xc0 - Actions triggered by events on PWM2A

pub fn gen2_b(&self) -> &GEN2_B

0xc4 - Actions triggered by events on PWM2B

pub fn dt2_cfg(&self) -> &DT2_CFG

0xc8 - dead time type selection and configuration

pub fn dt2_fed_cfg(&self) -> &DT2_FED_CFG

0xcc - Shadow register for falling edge delay (FED).

pub fn dt2_red_cfg(&self) -> &DT2_RED_CFG

0xd0 - Shadow register for rising edge delay (RED).

pub fn carrier2_cfg(&self) -> &CARRIER2_CFG

0xd4 - Carrier enable and configuratoin

pub fn fh2_cfg0(&self) -> &FH2_CFG0

0xd8 - Actions on PWM2A and PWM2B trip events

pub fn fh2_cfg1(&self) -> &FH2_CFG1

0xdc - Software triggers for fault handler actions

pub fn fh2_status(&self) -> &FH2_STATUS

0xe0 - Status of fault events.

pub fn fault_detect(&self) -> &FAULT_DETECT

0xe4 - Fault detection configuration and status

pub fn cap_timer_cfg(&self) -> &CAP_TIMER_CFG

0xe8 - Configure capture timer

pub fn cap_timer_phase(&self) -> &CAP_TIMER_PHASE

0xec - Phase for capture timer sync

pub fn cap_ch0_cfg(&self) -> &CAP_CH0_CFG

0xf0 - Capture channel 0 configuration and enable

pub fn cap_ch1_cfg(&self) -> &CAP_CH1_CFG

0xf4 - Capture channel 1 configuration and enable

pub fn cap_ch2_cfg(&self) -> &CAP_CH2_CFG

0xf8 - Capture channel 2 configuration and enable

pub fn cap_ch0(&self) -> &CAP_CH0

0xfc - ch0 capture value status register

pub fn cap_ch1(&self) -> &CAP_CH1

0x100 - ch1 capture value status register

pub fn cap_ch2(&self) -> &CAP_CH2

0x104 - ch2 capture value status register

pub fn cap_status(&self) -> &CAP_STATUS

0x108 - Edge of last capture trigger

pub fn update_cfg(&self) -> &UPDATE_CFG

0x10c - Enable update.

pub fn int_ena(&self) -> &INT_ENA

0x110 - Interrupt enable bits

pub fn int_raw(&self) -> &INT_RAW

0x114 - Raw interrupt status

pub fn int_st(&self) -> &INT_ST

0x118 - Masked interrupt status

pub fn int_clr(&self) -> &INT_CLR

0x11c - Interrupt clear bits

pub fn evt_en(&self) -> &EVT_EN

0x120 - MCPWM event enable register

pub fn task_en(&self) -> &TASK_EN

0x124 - MCPWM task enable register

pub fn clk(&self) -> &CLK

0x128 - MCPWM APB configuration register

pub fn version(&self) -> &VERSION

0x12c - Version register.

Trait Implementations

impl Debug for MCPWM0

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Deref for MCPWM0

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl Send for MCPWM0