Struct esp32h2::gpio_sd::glitch_filter_ch::GLITCH_FILTER_CH_SPEC

pub struct GLITCH_FILTER_CH_SPEC;

Glitch Filter Configure Register of Channel%s

You can read this register and get glitch_filter_ch::R. You can reset, write, write_with_zero this register using glitch_filter_ch::W. You can also modify this register. See API.

Trait Implementations

impl RegisterSpec for GLITCH_FILTER_CH_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for GLITCH_FILTER_CH_SPEC

reset() method sets GLITCH_FILTER_CH%s to value 0

const RESET_VALUE: Self::Ux = {transmute(0x00000000): <gpio_sd::glitch_filter_ch::GLITCH_FILTER_CH_SPEC as generic::RegisterSpec>::Ux}

Reset value of the register.

fn reset_value() -> Self::Ux

Reset value of the register.

impl Writable for GLITCH_FILTER_CH_SPEC

write(|w| ..) method takes glitch_filter_ch::W writer structure

const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = {transmute(0x00000000): <gpio_sd::glitch_filter_ch::GLITCH_FILTER_CH_SPEC as generic::RegisterSpec>::Ux}

Specifies the register bits that are not changed if you pass 1 and are changed if you pass 0

const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = {transmute(0x00000000): <gpio_sd::glitch_filter_ch::GLITCH_FILTER_CH_SPEC as generic::RegisterSpec>::Ux}

Specifies the register bits that are not changed if you pass 0 and are changed if you pass 1

impl Readable for GLITCH_FILTER_CH_SPEC

read() method returns glitch_filter_ch::R reader structure