Module esp32h2::parl_io::rx_mode_cfg

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Expand description

Parallel RX Sampling mode configuration register.

Structs

Type Aliases

  • R
    Register RX_MODE_CFG reader
  • RX_EXT_EN_INV_R
    Field RX_EXT_EN_INV reader - Set this bit to invert the external enable signal.
  • RX_EXT_EN_INV_W
    Field RX_EXT_EN_INV writer - Set this bit to invert the external enable signal.
  • RX_EXT_EN_SEL_R
    Field RX_EXT_EN_SEL reader - Configures rx external enable signal selection from IO PAD.
  • RX_EXT_EN_SEL_W
    Field RX_EXT_EN_SEL writer - Configures rx external enable signal selection from IO PAD.
  • RX_PULSE_SUBMODE_SEL_R
    Field RX_PULSE_SUBMODE_SEL reader - Configures the rxd pulse sampling submode. 4’d0: positive pulse start(data bit included) && positive pulse end(data bit included) 4’d1: positive pulse start(data bit included) && positive pulse end (data bit excluded) 4’d2: positive pulse start(data bit excluded) && positive pulse end (data bit included) 4’d3: positive pulse start(data bit excluded) && positive pulse end (data bit excluded) 4’d4: positive pulse start(data bit included) && length end 4’d5: positive pulse start(data bit excluded) && length end
  • RX_PULSE_SUBMODE_SEL_W
    Field RX_PULSE_SUBMODE_SEL writer - Configures the rxd pulse sampling submode. 4’d0: positive pulse start(data bit included) && positive pulse end(data bit included) 4’d1: positive pulse start(data bit included) && positive pulse end (data bit excluded) 4’d2: positive pulse start(data bit excluded) && positive pulse end (data bit included) 4’d3: positive pulse start(data bit excluded) && positive pulse end (data bit excluded) 4’d4: positive pulse start(data bit included) && length end 4’d5: positive pulse start(data bit excluded) && length end
  • RX_SMP_MODE_SEL_R
    Field RX_SMP_MODE_SEL reader - Configures the rxd sampling mode. 2’b00: external level enable mode 2’b01: external pulse enable mode 2’b10: internal software enable mode
  • RX_SMP_MODE_SEL_W
    Field RX_SMP_MODE_SEL writer - Configures the rxd sampling mode. 2’b00: external level enable mode 2’b01: external pulse enable mode 2’b10: internal software enable mode
  • RX_SW_EN_R
    Field RX_SW_EN reader - Set this bit to enable data sampling by software.
  • RX_SW_EN_W
    Field RX_SW_EN writer - Set this bit to enable data sampling by software.
  • W
    Register RX_MODE_CFG writer