Struct esp32h2::usb_device::RegisterBlock

source · 
#[repr(C)]
pub struct RegisterBlock {
Show 28 fields
    pub ep1: EP1,
    pub ep1_conf: EP1_CONF,
    pub int_raw: INT_RAW,
    pub int_st: INT_ST,
    pub int_ena: INT_ENA,
    pub int_clr: INT_CLR,
    pub conf0: CONF0,
    pub test: TEST,
    pub jfifo_st: JFIFO_ST,
    pub fram_num: FRAM_NUM,
    pub in_ep0_st: IN_EP0_ST,
    pub in_ep1_st: IN_EP1_ST,
    pub in_ep2_st: IN_EP2_ST,
    pub in_ep3_st: IN_EP3_ST,
    pub out_ep0_st: OUT_EP0_ST,
    pub out_ep1_st: OUT_EP1_ST,
    pub out_ep2_st: OUT_EP2_ST,
    pub misc_conf: MISC_CONF,
    pub mem_conf: MEM_CONF,
    pub chip_rst: CHIP_RST,
    pub set_line_code_w0: SET_LINE_CODE_W0,
    pub set_line_code_w1: SET_LINE_CODE_W1,
    pub get_line_code_w0: GET_LINE_CODE_W0,
    pub get_line_code_w1: GET_LINE_CODE_W1,
    pub config_update: CONFIG_UPDATE,
    pub ser_afifo_config: SER_AFIFO_CONFIG,
    pub bus_reset_st: BUS_RESET_ST,
    pub date: DATE,
    /* private fields */

}
Expand description

Register block

Fields§

§ep1: EP1

0x00 - FIFO access for the CDC-ACM data IN and OUT endpoints.

§ep1_conf: EP1_CONF

0x04 - Configuration and control registers for the CDC-ACM FIFOs.

§int_raw: INT_RAW

0x08 - Interrupt raw status register.

§int_st: INT_ST

0x0c - Interrupt status register.

§int_ena: INT_ENA

0x10 - Interrupt enable status register.

§int_clr: INT_CLR

0x14 - Interrupt clear status register.

§conf0: CONF0

0x18 - PHY hardware configuration.

§test: TEST

0x1c - Registers used for debugging the PHY.

§jfifo_st: JFIFO_ST

0x20 - JTAG FIFO status and control registers.

§fram_num: FRAM_NUM

0x24 - Last received SOF frame index register.

§in_ep0_st: IN_EP0_ST

0x28 - Control IN endpoint status information.

§in_ep1_st: IN_EP1_ST

0x2c - CDC-ACM IN endpoint status information.

§in_ep2_st: IN_EP2_ST

0x30 - CDC-ACM interrupt IN endpoint status information.

§in_ep3_st: IN_EP3_ST

0x34 - JTAG IN endpoint status information.

§out_ep0_st: OUT_EP0_ST

0x38 - Control OUT endpoint status information.

§out_ep1_st: OUT_EP1_ST

0x3c - CDC-ACM OUT endpoint status information.

§out_ep2_st: OUT_EP2_ST

0x40 - JTAG OUT endpoint status information.

§misc_conf: MISC_CONF

0x44 - Clock enable control

§mem_conf: MEM_CONF

0x48 - Memory power control

§chip_rst: CHIP_RST

0x4c - CDC-ACM chip reset control.

§set_line_code_w0: SET_LINE_CODE_W0

0x50 - W0 of SET_LINE_CODING command.

§set_line_code_w1: SET_LINE_CODE_W1

0x54 - W1 of SET_LINE_CODING command.

§get_line_code_w0: GET_LINE_CODE_W0

0x58 - W0 of GET_LINE_CODING command.

§get_line_code_w1: GET_LINE_CODE_W1

0x5c - W1 of GET_LINE_CODING command.

§config_update: CONFIG_UPDATE

0x60 - Configuration registers’ value update

§ser_afifo_config: SER_AFIFO_CONFIG

0x64 - Serial AFIFO configure register

§bus_reset_st: BUS_RESET_ST

0x68 - USB Bus reset status register

§date: DATE

0x80 - Date register

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