Struct esp32h2::assist_debug::RegisterBlock
source · #[repr(C)]pub struct RegisterBlock {Show 32 fields
pub core_0_montr_ena: CORE_0_MONTR_ENA,
pub core_0_intr_raw: CORE_0_INTR_RAW,
pub core_0_intr_ena: CORE_0_INTR_ENA,
pub core_0_intr_clr: CORE_0_INTR_CLR,
pub core_0_area_dram0_0_min: CORE_0_AREA_DRAM0_0_MIN,
pub core_0_area_dram0_0_max: CORE_0_AREA_DRAM0_0_MAX,
pub core_0_area_dram0_1_min: CORE_0_AREA_DRAM0_1_MIN,
pub core_0_area_dram0_1_max: CORE_0_AREA_DRAM0_1_MAX,
pub core_0_area_pif_0_min: CORE_0_AREA_PIF_0_MIN,
pub core_0_area_pif_0_max: CORE_0_AREA_PIF_0_MAX,
pub core_0_area_pif_1_min: CORE_0_AREA_PIF_1_MIN,
pub core_0_area_pif_1_max: CORE_0_AREA_PIF_1_MAX,
pub core_0_area_pc: CORE_0_AREA_PC,
pub core_0_area_sp: CORE_0_AREA_SP,
pub core_0_sp_min: CORE_0_SP_MIN,
pub core_0_sp_max: CORE_0_SP_MAX,
pub core_0_sp_pc: CORE_0_SP_PC,
pub core_0_rcd_en: CORE_0_RCD_EN,
pub core_0_rcd_pdebugpc: CORE_0_RCD_PDEBUGPC,
pub core_0_rcd_pdebugsp: CORE_0_RCD_PDEBUGSP,
pub core_0_iram0_exception_monitor_0: CORE_0_IRAM0_EXCEPTION_MONITOR_0,
pub core_0_iram0_exception_monitor_1: CORE_0_IRAM0_EXCEPTION_MONITOR_1,
pub core_0_dram0_exception_monitor_0: CORE_0_DRAM0_EXCEPTION_MONITOR_0,
pub core_0_dram0_exception_monitor_1: CORE_0_DRAM0_EXCEPTION_MONITOR_1,
pub core_0_dram0_exception_monitor_2: CORE_0_DRAM0_EXCEPTION_MONITOR_2,
pub core_0_dram0_exception_monitor_3: CORE_0_DRAM0_EXCEPTION_MONITOR_3,
pub core_x_iram0_dram0_exception_monitor_0: CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_0,
pub core_x_iram0_dram0_exception_monitor_1: CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_1,
pub c0re_0_lastpc_before_exception: C0RE_0_LASTPC_BEFORE_EXCEPTION,
pub c0re_0_debug_mode: C0RE_0_DEBUG_MODE,
pub clock_gate: CLOCK_GATE,
pub date: DATE,
/* private fields */
}
Expand description
Register block
Fields§
§core_0_montr_ena: CORE_0_MONTR_ENA
0x00 - core0 monitor enable configuration register
core_0_intr_raw: CORE_0_INTR_RAW
0x04 - core0 monitor interrupt status register
core_0_intr_ena: CORE_0_INTR_ENA
0x08 - core0 monitor interrupt enable register
core_0_intr_clr: CORE_0_INTR_CLR
0x0c - core0 monitor interrupt clr register
core_0_area_dram0_0_min: CORE_0_AREA_DRAM0_0_MIN
0x10 - core0 dram0 region0 addr configuration register
core_0_area_dram0_0_max: CORE_0_AREA_DRAM0_0_MAX
0x14 - core0 dram0 region0 addr configuration register
core_0_area_dram0_1_min: CORE_0_AREA_DRAM0_1_MIN
0x18 - core0 dram0 region1 addr configuration register
core_0_area_dram0_1_max: CORE_0_AREA_DRAM0_1_MAX
0x1c - core0 dram0 region1 addr configuration register
core_0_area_pif_0_min: CORE_0_AREA_PIF_0_MIN
0x20 - core0 PIF region0 addr configuration register
core_0_area_pif_0_max: CORE_0_AREA_PIF_0_MAX
0x24 - core0 PIF region0 addr configuration register
core_0_area_pif_1_min: CORE_0_AREA_PIF_1_MIN
0x28 - core0 PIF region1 addr configuration register
core_0_area_pif_1_max: CORE_0_AREA_PIF_1_MAX
0x2c - core0 PIF region1 addr configuration register
core_0_area_pc: CORE_0_AREA_PC
0x30 - core0 area pc status register
core_0_area_sp: CORE_0_AREA_SP
0x34 - core0 area sp status register
core_0_sp_min: CORE_0_SP_MIN
0x38 - stack min value
core_0_sp_max: CORE_0_SP_MAX
0x3c - stack max value
core_0_sp_pc: CORE_0_SP_PC
0x40 - stack monitor pc status register
core_0_rcd_en: CORE_0_RCD_EN
0x44 - record enable configuration register
core_0_rcd_pdebugpc: CORE_0_RCD_PDEBUGPC
0x48 - record status regsiter
core_0_rcd_pdebugsp: CORE_0_RCD_PDEBUGSP
0x4c - record status regsiter
core_0_iram0_exception_monitor_0: CORE_0_IRAM0_EXCEPTION_MONITOR_0
0x50 - exception monitor status register0
core_0_iram0_exception_monitor_1: CORE_0_IRAM0_EXCEPTION_MONITOR_1
0x54 - exception monitor status register1
core_0_dram0_exception_monitor_0: CORE_0_DRAM0_EXCEPTION_MONITOR_0
0x58 - exception monitor status register2
core_0_dram0_exception_monitor_1: CORE_0_DRAM0_EXCEPTION_MONITOR_1
0x5c - exception monitor status register3
core_0_dram0_exception_monitor_2: CORE_0_DRAM0_EXCEPTION_MONITOR_2
0x60 - exception monitor status register4
core_0_dram0_exception_monitor_3: CORE_0_DRAM0_EXCEPTION_MONITOR_3
0x64 - exception monitor status register5
core_x_iram0_dram0_exception_monitor_0: CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_0
0x68 - exception monitor status register6
core_x_iram0_dram0_exception_monitor_1: CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_1
0x6c - exception monitor status register7
c0re_0_lastpc_before_exception: C0RE_0_LASTPC_BEFORE_EXCEPTION
0x70 - cpu status register
c0re_0_debug_mode: C0RE_0_DEBUG_MODE
0x74 - cpu status register
clock_gate: CLOCK_GATE
0x78 - clock register
date: DATE
0x3fc - version register