Struct esp32h2::spi0::spi_mem_dout_mode::W

pub struct W(_);

Register SPI_MEM_DOUT_MODE writer

Implementations

impl W

pub fn spi_mem_dout0_mode(&mut self) -> SPI_MEM_DOUT0_MODE_W<'_, 0>

Bit 0 - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the posedge of clk_160,4 output with the negedge of clk_160,5: output with the spi_clk high edge ,6: output with the spi_clk low edge

pub fn spi_mem_dout1_mode(&mut self) -> SPI_MEM_DOUT1_MODE_W<'_, 1>

Bit 1 - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the posedge of clk_160,4 output with the negedge of clk_160,5: output with the spi_clk high edge ,6: output with the spi_clk low edge

pub fn spi_mem_dout2_mode(&mut self) -> SPI_MEM_DOUT2_MODE_W<'_, 2>

Bit 2 - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the posedge of clk_160,4 output with the negedge of clk_160,5: output with the spi_clk high edge ,6: output with the spi_clk low edge

pub fn spi_mem_dout3_mode(&mut self) -> SPI_MEM_DOUT3_MODE_W<'_, 3>

Bit 3 - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the posedge of clk_160,4 output with the negedge of clk_160,5: output with the spi_clk high edge ,6: output with the spi_clk low edge

pub fn spi_mem_dout4_mode(&mut self) -> SPI_MEM_DOUT4_MODE_W<'_, 4>

Bit 4 - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the spi_clk

pub fn spi_mem_dout5_mode(&mut self) -> SPI_MEM_DOUT5_MODE_W<'_, 5>

Bit 5 - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the spi_clk

pub fn spi_mem_dout6_mode(&mut self) -> SPI_MEM_DOUT6_MODE_W<'_, 6>

Bit 6 - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the spi_clk

pub fn spi_mem_dout7_mode(&mut self) -> SPI_MEM_DOUT7_MODE_W<'_, 7>

Bit 7 - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the spi_clk

pub fn spi_mem_douts_mode(&mut self) -> SPI_MEM_DOUTS_MODE_W<'_, 8>

Bit 8 - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the spi_clk

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Methods from Deref<Target = W<SPI_MEM_DOUT_MODE_SPEC>>

pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self

Writes raw bits to the register.

Safety

Read datasheet or reference manual to find what values are allowed to pass.

Trait Implementations

impl Deref for W

type Target = W<SPI_MEM_DOUT_MODE_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut Self::Target

Mutably dereferences the value.

impl From<W<SPI_MEM_DOUT_MODE_SPEC>> for W

fn from(writer: W<SPI_MEM_DOUT_MODE_SPEC>) -> Self

Converts to this type from the input type.