Struct esp32h2::spi0::RegisterBlock

source · 
#[repr(C)]
pub struct RegisterBlock {
Show 60 fields
    pub spi_mem_cmd: SPI_MEM_CMD,
    pub spi_mem_ctrl: SPI_MEM_CTRL,
    pub spi_mem_ctrl1: SPI_MEM_CTRL1,
    pub spi_mem_ctrl2: SPI_MEM_CTRL2,
    pub spi_mem_clock: SPI_MEM_CLOCK,
    pub spi_mem_user: SPI_MEM_USER,
    pub spi_mem_user1: SPI_MEM_USER1,
    pub spi_mem_user2: SPI_MEM_USER2,
    pub spi_mem_rd_status: SPI_MEM_RD_STATUS,
    pub spi_mem_misc: SPI_MEM_MISC,
    pub spi_mem_cache_fctrl: SPI_MEM_CACHE_FCTRL,
    pub spi_mem_cache_sctrl: SPI_MEM_CACHE_SCTRL,
    pub spi_mem_sram_cmd: SPI_MEM_SRAM_CMD,
    pub spi_mem_sram_drd_cmd: SPI_MEM_SRAM_DRD_CMD,
    pub spi_mem_sram_dwr_cmd: SPI_MEM_SRAM_DWR_CMD,
    pub spi_mem_sram_clk: SPI_MEM_SRAM_CLK,
    pub spi_mem_fsm: SPI_MEM_FSM,
    pub spi_mem_int_ena: SPI_MEM_INT_ENA,
    pub spi_mem_int_clr: SPI_MEM_INT_CLR,
    pub spi_mem_int_raw: SPI_MEM_INT_RAW,
    pub spi_mem_int_st: SPI_MEM_INT_ST,
    pub spi_mem_ddr: SPI_MEM_DDR,
    pub spi_smem_ddr: SPI_SMEM_DDR,
    pub spi_fmem_pms_attr: [SPI_FMEM_PMS_ATTR; 4],
    pub spi_fmem_pms_addr: [SPI_FMEM_PMS_ADDR; 4],
    pub spi_fmem_pms_size: [SPI_FMEM_PMS_SIZE; 4],
    pub spi_smem_pms_attr: [SPI_SMEM_PMS_ATTR; 4],
    pub spi_smem_pms_addr: [SPI_SMEM_PMS_ADDR; 4],
    pub spi_smem_pms_size: [SPI_SMEM_PMS_SIZE; 4],
    pub spi_mem_pms_reject: SPI_MEM_PMS_REJECT,
    pub spi_mem_ecc_ctrl: SPI_MEM_ECC_CTRL,
    pub spi_mem_ecc_err_addr: SPI_MEM_ECC_ERR_ADDR,
    pub spi_mem_axi_err_addr: SPI_MEM_AXI_ERR_ADDR,
    pub spi_smem_ecc_ctrl: SPI_SMEM_ECC_CTRL,
    pub spi_mem_timing_cali: SPI_MEM_TIMING_CALI,
    pub spi_mem_din_mode: SPI_MEM_DIN_MODE,
    pub spi_mem_din_num: SPI_MEM_DIN_NUM,
    pub spi_mem_dout_mode: SPI_MEM_DOUT_MODE,
    pub spi_smem_timing_cali: SPI_SMEM_TIMING_CALI,
    pub spi_smem_din_mode: SPI_SMEM_DIN_MODE,
    pub spi_smem_din_num: SPI_SMEM_DIN_NUM,
    pub spi_smem_dout_mode: SPI_SMEM_DOUT_MODE,
    pub spi_smem_ac: SPI_SMEM_AC,
    pub spi_mem_clock_gate: SPI_MEM_CLOCK_GATE,
    pub spi_mem_xts_plain_base: SPI_MEM_XTS_PLAIN_BASE,
    pub spi_mem_xts_linesize: SPI_MEM_XTS_LINESIZE,
    pub spi_mem_xts_destination: SPI_MEM_XTS_DESTINATION,
    pub spi_mem_xts_physical_address: SPI_MEM_XTS_PHYSICAL_ADDRESS,
    pub spi_mem_xts_trigger: SPI_MEM_XTS_TRIGGER,
    pub spi_mem_xts_release: SPI_MEM_XTS_RELEASE,
    pub spi_mem_xts_destroy: SPI_MEM_XTS_DESTROY,
    pub spi_mem_xts_state: SPI_MEM_XTS_STATE,
    pub spi_mem_xts_date: SPI_MEM_XTS_DATE,
    pub spi_mem_mmu_item_content: SPI_MEM_MMU_ITEM_CONTENT,
    pub spi_mem_mmu_item_index: SPI_MEM_MMU_ITEM_INDEX,
    pub spi_mem_mmu_power_ctrl: SPI_MEM_MMU_POWER_CTRL,
    pub spi_mem_dpa_ctrl: SPI_MEM_DPA_CTRL,
    pub spi_mem_registerrnd_eco_high: SPI_MEM_REGISTERRND_ECO_HIGH,
    pub spi_mem_registerrnd_eco_low: SPI_MEM_REGISTERRND_ECO_LOW,
    pub spi_mem_date: SPI_MEM_DATE,
    /* private fields */

}
Expand description

Register block

Fields§

§spi_mem_cmd: SPI_MEM_CMD

0x00 - SPI0 FSM status register

§spi_mem_ctrl: SPI_MEM_CTRL

0x08 - SPI0 control register.

§spi_mem_ctrl1: SPI_MEM_CTRL1

0x0c - SPI0 control1 register.

§spi_mem_ctrl2: SPI_MEM_CTRL2

0x10 - SPI0 control2 register.

§spi_mem_clock: SPI_MEM_CLOCK

0x14 - SPI clock division control register.

§spi_mem_user: SPI_MEM_USER

0x18 - SPI0 user register.

§spi_mem_user1: SPI_MEM_USER1

0x1c - SPI0 user1 register.

§spi_mem_user2: SPI_MEM_USER2

0x20 - SPI0 user2 register.

§spi_mem_rd_status: SPI_MEM_RD_STATUS

0x2c - SPI0 read control register.

§spi_mem_misc: SPI_MEM_MISC

0x34 - SPI0 misc register

§spi_mem_cache_fctrl: SPI_MEM_CACHE_FCTRL

0x3c - SPI0 bit mode control register.

§spi_mem_cache_sctrl: SPI_MEM_CACHE_SCTRL

0x40 - SPI0 external RAM control register

§spi_mem_sram_cmd: SPI_MEM_SRAM_CMD

0x44 - SPI0 external RAM mode control register

§spi_mem_sram_drd_cmd: SPI_MEM_SRAM_DRD_CMD

0x48 - SPI0 external RAM DDR read command control register

§spi_mem_sram_dwr_cmd: SPI_MEM_SRAM_DWR_CMD

0x4c - SPI0 external RAM DDR write command control register

§spi_mem_sram_clk: SPI_MEM_SRAM_CLK

0x50 - SPI0 external RAM clock control register

§spi_mem_fsm: SPI_MEM_FSM

0x54 - SPI0 FSM status register

§spi_mem_int_ena: SPI_MEM_INT_ENA

0xc0 - SPI0 interrupt enable register

§spi_mem_int_clr: SPI_MEM_INT_CLR

0xc4 - SPI0 interrupt clear register

§spi_mem_int_raw: SPI_MEM_INT_RAW

0xc8 - SPI0 interrupt raw register

§spi_mem_int_st: SPI_MEM_INT_ST

0xcc - SPI0 interrupt status register

§spi_mem_ddr: SPI_MEM_DDR

0xd4 - SPI0 flash DDR mode control register

§spi_smem_ddr: SPI_SMEM_DDR

0xd8 - SPI0 external RAM DDR mode control register

§spi_fmem_pms_attr: [SPI_FMEM_PMS_ATTR; 4]

0x100..0x110 - MSPI flash ACE section %s attribute register

§spi_fmem_pms_addr: [SPI_FMEM_PMS_ADDR; 4]

0x110..0x120 - SPI1 flash ACE section %s start address register

§spi_fmem_pms_size: [SPI_FMEM_PMS_SIZE; 4]

0x120..0x130 - SPI1 flash ACE section %s start address register

§spi_smem_pms_attr: [SPI_SMEM_PMS_ATTR; 4]

0x130..0x140 - SPI1 flash ACE section %s start address register

§spi_smem_pms_addr: [SPI_SMEM_PMS_ADDR; 4]

0x140..0x150 - SPI1 external RAM ACE section %s start address register

§spi_smem_pms_size: [SPI_SMEM_PMS_SIZE; 4]

0x150..0x160 - SPI1 external RAM ACE section %s start address register

§spi_mem_pms_reject: SPI_MEM_PMS_REJECT

0x164 - SPI1 access reject register

§spi_mem_ecc_ctrl: SPI_MEM_ECC_CTRL

0x168 - MSPI ECC control register

§spi_mem_ecc_err_addr: SPI_MEM_ECC_ERR_ADDR

0x16c - MSPI ECC error address register

§spi_mem_axi_err_addr: SPI_MEM_AXI_ERR_ADDR

0x170 - SPI0 AXI request error address.

§spi_smem_ecc_ctrl: SPI_SMEM_ECC_CTRL

0x174 - MSPI ECC control register

§spi_mem_timing_cali: SPI_MEM_TIMING_CALI

0x180 - SPI0 flash timing calibration register

§spi_mem_din_mode: SPI_MEM_DIN_MODE

0x184 - MSPI flash input timing delay mode control register

§spi_mem_din_num: SPI_MEM_DIN_NUM

0x188 - MSPI flash input timing delay number control register

§spi_mem_dout_mode: SPI_MEM_DOUT_MODE

0x18c - MSPI flash output timing adjustment control register

§spi_smem_timing_cali: SPI_SMEM_TIMING_CALI

0x190 - MSPI external RAM timing calibration register

§spi_smem_din_mode: SPI_SMEM_DIN_MODE

0x194 - MSPI external RAM input timing delay mode control register

§spi_smem_din_num: SPI_SMEM_DIN_NUM

0x198 - MSPI external RAM input timing delay number control register

§spi_smem_dout_mode: SPI_SMEM_DOUT_MODE

0x19c - MSPI external RAM output timing adjustment control register

§spi_smem_ac: SPI_SMEM_AC

0x1a0 - MSPI external RAM ECC and SPI CS timing control register

§spi_mem_clock_gate: SPI_MEM_CLOCK_GATE

0x200 - SPI0 clock gate register

§spi_mem_xts_plain_base: SPI_MEM_XTS_PLAIN_BASE

0x300 - The base address of the memory that stores plaintext in Manual Encryption

§spi_mem_xts_linesize: SPI_MEM_XTS_LINESIZE

0x340 - Manual Encryption Line-Size register

§spi_mem_xts_destination: SPI_MEM_XTS_DESTINATION

0x344 - Manual Encryption destination register

§spi_mem_xts_physical_address: SPI_MEM_XTS_PHYSICAL_ADDRESS

0x348 - Manual Encryption physical address register

§spi_mem_xts_trigger: SPI_MEM_XTS_TRIGGER

0x34c - Manual Encryption physical address register

§spi_mem_xts_release: SPI_MEM_XTS_RELEASE

0x350 - Manual Encryption physical address register

§spi_mem_xts_destroy: SPI_MEM_XTS_DESTROY

0x354 - Manual Encryption physical address register

§spi_mem_xts_state: SPI_MEM_XTS_STATE

0x358 - Manual Encryption physical address register

§spi_mem_xts_date: SPI_MEM_XTS_DATE

0x35c - Manual Encryption version register

§spi_mem_mmu_item_content: SPI_MEM_MMU_ITEM_CONTENT

0x37c - MSPI-MMU item content register

§spi_mem_mmu_item_index: SPI_MEM_MMU_ITEM_INDEX

0x380 - MSPI-MMU item index register

§spi_mem_mmu_power_ctrl: SPI_MEM_MMU_POWER_CTRL

0x384 - MSPI MMU power control register

§spi_mem_dpa_ctrl: SPI_MEM_DPA_CTRL

0x388 - SPI memory cryption DPA register

§spi_mem_registerrnd_eco_high: SPI_MEM_REGISTERRND_ECO_HIGH

0x3f0 - MSPI ECO high register

§spi_mem_registerrnd_eco_low: SPI_MEM_REGISTERRND_ECO_LOW

0x3f4 - MSPI ECO low register

§spi_mem_date: SPI_MEM_DATE

0x3fc - SPI0 version control register

Auto Trait Implementations§

Blanket Implementations§

source§

impl<T> Any for Twhere T: 'static + ?Sized,

source§

fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
source§

impl<T> Borrow<T> for Twhere T: ?Sized,

source§

fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
source§

impl<T> BorrowMut<T> for Twhere T: ?Sized,

source§

fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
source§

impl<T> From<T> for T

source§

fn from(t: T) -> T

Returns the argument unchanged.

source§

impl<T, U> Into<U> for Twhere U: From<T>,

source§

fn into(self) -> U

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

source§

impl<T, U> TryFrom<U> for Twhere U: Into<T>,

§

type Error = Infallible

The type returned in the event of a conversion error.
source§

fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.
source§

impl<T, U> TryInto<U> for Twhere U: TryFrom<T>,

§

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.
source§

fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Performs the conversion.