Struct esp32h2::pcnt::u_conf0::R

pub struct R(_);

Register U%s_CONF0 reader

Implementations

impl R

pub fn filter_thres(&self) -> FILTER_THRES_R

Bits 0:9 - This sets the maximum threshold, in APB_CLK cycles, for the filter. Any pulses with width less than this will be ignored when the filter is enabled.

pub fn filter_en(&self) -> FILTER_EN_R

Bit 10 - This is the enable bit for unit %s’s input filter.

pub fn thr_zero_en(&self) -> THR_ZERO_EN_R

Bit 11 - This is the enable bit for unit %s’s zero comparator.

pub fn thr_h_lim_en(&self) -> THR_H_LIM_EN_R

Bit 12 - This is the enable bit for unit %s’s thr_h_lim comparator. Configures it to enable the high limit interrupt.

pub fn thr_l_lim_en(&self) -> THR_L_LIM_EN_R

Bit 13 - This is the enable bit for unit %s’s thr_l_lim comparator. Configures it to enable the low limit interrupt.

pub fn thr_thres0_en(&self) -> THR_THRES0_EN_R

Bit 14 - This is the enable bit for unit %s’s thres0 comparator.

pub fn thr_thres1_en(&self) -> THR_THRES1_EN_R

Bit 15 - This is the enable bit for unit %s’s thres1 comparator.

pub fn ch0_neg_mode(&self) -> CH0_NEG_MODE_R

Bits 16:17 - This register sets the behavior when the signal input of channel 0 detects a negative edge. 1: Increase the counter.2: Decrease the counter.0, 3: No effect on counter

pub fn ch0_pos_mode(&self) -> CH0_POS_MODE_R

Bits 18:19 - This register sets the behavior when the signal input of channel 0 detects a positive edge. 1: Increase the counter.2: Decrease the counter.0, 3: No effect on counter

pub fn ch0_hctrl_mode(&self) -> CH0_HCTRL_MODE_R

Bits 20:21 - This register configures how the CH%s_POS_MODE/CH%s_NEG_MODE settings will be modified when the control signal is high. 0: No modification.1: Invert behavior (increase -> decrease, decrease -> increase).2, 3: Inhibit counter modification

pub fn ch0_lctrl_mode(&self) -> CH0_LCTRL_MODE_R

Bits 22:23 - This register configures how the CH%s_POS_MODE/CH%s_NEG_MODE settings will be modified when the control signal is low. 0: No modification.1: Invert behavior (increase -> decrease, decrease -> increase).2, 3: Inhibit counter modification

pub fn ch1_neg_mode(&self) -> CH1_NEG_MODE_R

Bits 24:25 - This register sets the behavior when the signal input of channel 1 detects a negative edge. 1: Increment the counter.2: Decrement the counter.0, 3: No effect on counter

pub fn ch1_pos_mode(&self) -> CH1_POS_MODE_R

Bits 26:27 - This register sets the behavior when the signal input of channel 1 detects a positive edge. 1: Increment the counter.2: Decrement the counter.0, 3: No effect on counter

pub fn ch1_hctrl_mode(&self) -> CH1_HCTRL_MODE_R

Bits 28:29 - This register configures how the CH%s_POS_MODE/CH%s_NEG_MODE settings will be modified when the control signal is high. 0: No modification.1: Invert behavior (increase -> decrease, decrease -> increase).2, 3: Inhibit counter modification

pub fn ch1_lctrl_mode(&self) -> CH1_LCTRL_MODE_R

Bits 30:31 - This register configures how the CH%s_POS_MODE/CH%s_NEG_MODE settings will be modified when the control signal is low. 0: No modification.1: Invert behavior (increase -> decrease, decrease -> increase).2, 3: Inhibit counter modification

Methods from Deref<Target = R<U_CONF0_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<U_CONF0_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<U_CONF0_SPEC>> for R

fn from(reader: R<U_CONF0_SPEC>) -> Self

Converts to this type from the input type.