Struct esp32h2::mcpwm0::gen1_force::R
source · pub struct R(_);
Expand description
Register GEN1_FORCE
reader
Implementations§
source§impl R
impl R
sourcepub fn gen1_cntuforce_upmethod(&self) -> GEN1_CNTUFORCE_UPMETHOD_R
pub fn gen1_cntuforce_upmethod(&self) -> GEN1_CNTUFORCE_UPMETHOD_R
Bits 0:5 - Updating method for continuous software force of PWM generator 1. When all bits are set to 0: immediately, when bit0 is set to 1: TEZ,,when bit1 is set to 1: TEP, when bit2 is set to 1: TEA, when bit3 is set to 1: TEB, when bit4 is set to 1: sync, when bit5 is set to 1: disable update. (TEA/B here and below means an event generated when the timer’s value equals to that of register A/B.)
sourcepub fn gen1_a_cntuforce_mode(&self) -> GEN1_A_CNTUFORCE_MODE_R
pub fn gen1_a_cntuforce_mode(&self) -> GEN1_A_CNTUFORCE_MODE_R
Bits 6:7 - Continuous software force mode for PWM1A. 0: disabled, 1: low, 2: high, 3: disabled
sourcepub fn gen1_b_cntuforce_mode(&self) -> GEN1_B_CNTUFORCE_MODE_R
pub fn gen1_b_cntuforce_mode(&self) -> GEN1_B_CNTUFORCE_MODE_R
Bits 8:9 - Continuous software force mode for PWM1B. 0: disabled, 1: low, 2: high, 3: disabled
sourcepub fn gen1_a_nciforce(&self) -> GEN1_A_NCIFORCE_R
pub fn gen1_a_nciforce(&self) -> GEN1_A_NCIFORCE_R
Bit 10 - Trigger of non-continuous immediate software-force event for PWM1A, a toggle will trigger a force event.
sourcepub fn gen1_a_nciforce_mode(&self) -> GEN1_A_NCIFORCE_MODE_R
pub fn gen1_a_nciforce_mode(&self) -> GEN1_A_NCIFORCE_MODE_R
Bits 11:12 - non-continuous immediate software force mode for PWM1A, 0: disabled, 1: low, 2: high, 3: disabled
sourcepub fn gen1_b_nciforce(&self) -> GEN1_B_NCIFORCE_R
pub fn gen1_b_nciforce(&self) -> GEN1_B_NCIFORCE_R
Bit 13 - Trigger of non-continuous immediate software-force event for PWM1B, a toggle will trigger a force event.
sourcepub fn gen1_b_nciforce_mode(&self) -> GEN1_B_NCIFORCE_MODE_R
pub fn gen1_b_nciforce_mode(&self) -> GEN1_B_NCIFORCE_MODE_R
Bits 14:15 - non-continuous immediate software force mode for PWM1B, 0: disabled, 1: low, 2: high, 3: disabled