pub type R = R<FIFO_CONF_SPEC>;
Expand description
Register FIFO_CONF
reader
Aliased Type§
pub struct R { /* private fields */ }
Implementations§
Source§impl R
impl R
Sourcepub fn rxfifo_wm_thrhd(&self) -> RXFIFO_WM_THRHD_R
pub fn rxfifo_wm_thrhd(&self) -> RXFIFO_WM_THRHD_R
Bits 0:4 - The water mark threshold of rx FIFO in nonfifo access mode. When reg_reg_fifo_prt_en is 1 and rx FIFO counter is bigger than reg_rxfifo_wm_thrhd[4:0], reg_rxfifo_wm_int_raw bit will be valid.
Sourcepub fn txfifo_wm_thrhd(&self) -> TXFIFO_WM_THRHD_R
pub fn txfifo_wm_thrhd(&self) -> TXFIFO_WM_THRHD_R
Bits 5:9 - The water mark threshold of tx FIFO in nonfifo access mode. When reg_reg_fifo_prt_en is 1 and tx FIFO counter is smaller than reg_txfifo_wm_thrhd[4:0], reg_txfifo_wm_int_raw bit will be valid.
Sourcepub fn nonfifo_en(&self) -> NONFIFO_EN_R
pub fn nonfifo_en(&self) -> NONFIFO_EN_R
Bit 10 - Set this bit to enable APB nonfifo access.
Sourcepub fn fifo_addr_cfg_en(&self) -> FIFO_ADDR_CFG_EN_R
pub fn fifo_addr_cfg_en(&self) -> FIFO_ADDR_CFG_EN_R
Bit 11 - When this bit is set to 1, the byte received after the I2C address byte represents the offset address in the I2C Slave RAM.
Sourcepub fn rx_fifo_rst(&self) -> RX_FIFO_RST_R
pub fn rx_fifo_rst(&self) -> RX_FIFO_RST_R
Bit 12 - Set this bit to reset rx-fifo.
Sourcepub fn tx_fifo_rst(&self) -> TX_FIFO_RST_R
pub fn tx_fifo_rst(&self) -> TX_FIFO_RST_R
Bit 13 - Set this bit to reset tx-fifo.
Sourcepub fn fifo_prt_en(&self) -> FIFO_PRT_EN_R
pub fn fifo_prt_en(&self) -> FIFO_PRT_EN_R
Bit 14 - The control enable bit of FIFO pointer in non-fifo access mode. This bit controls the valid bits and the interrupts of tx/rx_fifo overflow, underflow, full and empty.