1#[repr(C)]
2#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5 core_0_montr_ena: CORE_0_MONTR_ENA,
6 core_0_intr_raw: CORE_0_INTR_RAW,
7 core_0_intr_ena: CORE_0_INTR_ENA,
8 core_0_intr_clr: CORE_0_INTR_CLR,
9 core_0_area_dram0_0_min: CORE_0_AREA_DRAM0_0_MIN,
10 core_0_area_dram0_0_max: CORE_0_AREA_DRAM0_0_MAX,
11 core_0_area_dram0_1_min: CORE_0_AREA_DRAM0_1_MIN,
12 core_0_area_dram0_1_max: CORE_0_AREA_DRAM0_1_MAX,
13 core_0_area_pif_0_min: CORE_0_AREA_PIF_0_MIN,
14 core_0_area_pif_0_max: CORE_0_AREA_PIF_0_MAX,
15 core_0_area_pif_1_min: CORE_0_AREA_PIF_1_MIN,
16 core_0_area_pif_1_max: CORE_0_AREA_PIF_1_MAX,
17 core_0_area_pc: CORE_0_AREA_PC,
18 core_0_area_sp: CORE_0_AREA_SP,
19 core_0_sp_min: CORE_0_SP_MIN,
20 core_0_sp_max: CORE_0_SP_MAX,
21 core_0_sp_pc: CORE_0_SP_PC,
22 core_0_rcd_en: CORE_0_RCD_EN,
23 core_0_rcd_pdebugpc: CORE_0_RCD_PDEBUGPC,
24 core_0_rcd_pdebugsp: CORE_0_RCD_PDEBUGSP,
25 core_0_iram0_exception_monitor_0: CORE_0_IRAM0_EXCEPTION_MONITOR_0,
26 core_0_iram0_exception_monitor_1: CORE_0_IRAM0_EXCEPTION_MONITOR_1,
27 core_0_dram0_exception_monitor_0: CORE_0_DRAM0_EXCEPTION_MONITOR_0,
28 core_0_dram0_exception_monitor_1: CORE_0_DRAM0_EXCEPTION_MONITOR_1,
29 core_0_dram0_exception_monitor_2: CORE_0_DRAM0_EXCEPTION_MONITOR_2,
30 core_0_dram0_exception_monitor_3: CORE_0_DRAM0_EXCEPTION_MONITOR_3,
31 core_x_iram0_dram0_exception_monitor_0: CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_0,
32 core_x_iram0_dram0_exception_monitor_1: CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_1,
33 core_0_lastpc_before_exception: CORE_0_LASTPC_BEFORE_EXCEPTION,
34 core_0_debug_mode: CORE_0_DEBUG_MODE,
35 clock_gate: CLOCK_GATE,
36 _reserved31: [u8; 0x0380],
37 date: DATE,
38}
39impl RegisterBlock {
40 #[doc = "0x00 - ASSIST_DEBUG_CORE_0_MONTR_ENA_REG"]
41 #[inline(always)]
42 pub const fn core_0_montr_ena(&self) -> &CORE_0_MONTR_ENA {
43 &self.core_0_montr_ena
44 }
45 #[doc = "0x04 - core0 monitor interrupt status register"]
46 #[inline(always)]
47 pub const fn core_0_intr_raw(&self) -> &CORE_0_INTR_RAW {
48 &self.core_0_intr_raw
49 }
50 #[doc = "0x08 - core0 monitor interrupt enable register"]
51 #[inline(always)]
52 pub const fn core_0_intr_ena(&self) -> &CORE_0_INTR_ENA {
53 &self.core_0_intr_ena
54 }
55 #[doc = "0x0c - core0 monitor interrupt clr register"]
56 #[inline(always)]
57 pub const fn core_0_intr_clr(&self) -> &CORE_0_INTR_CLR {
58 &self.core_0_intr_clr
59 }
60 #[doc = "0x10 - core0 dram0 region0 addr configuration register"]
61 #[inline(always)]
62 pub const fn core_0_area_dram0_0_min(&self) -> &CORE_0_AREA_DRAM0_0_MIN {
63 &self.core_0_area_dram0_0_min
64 }
65 #[doc = "0x14 - core0 dram0 region0 addr configuration register"]
66 #[inline(always)]
67 pub const fn core_0_area_dram0_0_max(&self) -> &CORE_0_AREA_DRAM0_0_MAX {
68 &self.core_0_area_dram0_0_max
69 }
70 #[doc = "0x18 - core0 dram0 region1 addr configuration register"]
71 #[inline(always)]
72 pub const fn core_0_area_dram0_1_min(&self) -> &CORE_0_AREA_DRAM0_1_MIN {
73 &self.core_0_area_dram0_1_min
74 }
75 #[doc = "0x1c - core0 dram0 region1 addr configuration register"]
76 #[inline(always)]
77 pub const fn core_0_area_dram0_1_max(&self) -> &CORE_0_AREA_DRAM0_1_MAX {
78 &self.core_0_area_dram0_1_max
79 }
80 #[doc = "0x20 - core0 PIF region0 addr configuration register"]
81 #[inline(always)]
82 pub const fn core_0_area_pif_0_min(&self) -> &CORE_0_AREA_PIF_0_MIN {
83 &self.core_0_area_pif_0_min
84 }
85 #[doc = "0x24 - core0 PIF region0 addr configuration register"]
86 #[inline(always)]
87 pub const fn core_0_area_pif_0_max(&self) -> &CORE_0_AREA_PIF_0_MAX {
88 &self.core_0_area_pif_0_max
89 }
90 #[doc = "0x28 - core0 PIF region1 addr configuration register"]
91 #[inline(always)]
92 pub const fn core_0_area_pif_1_min(&self) -> &CORE_0_AREA_PIF_1_MIN {
93 &self.core_0_area_pif_1_min
94 }
95 #[doc = "0x2c - core0 PIF region1 addr configuration register"]
96 #[inline(always)]
97 pub const fn core_0_area_pif_1_max(&self) -> &CORE_0_AREA_PIF_1_MAX {
98 &self.core_0_area_pif_1_max
99 }
100 #[doc = "0x30 - core0 area pc status register"]
101 #[inline(always)]
102 pub const fn core_0_area_pc(&self) -> &CORE_0_AREA_PC {
103 &self.core_0_area_pc
104 }
105 #[doc = "0x34 - core0 area sp status register"]
106 #[inline(always)]
107 pub const fn core_0_area_sp(&self) -> &CORE_0_AREA_SP {
108 &self.core_0_area_sp
109 }
110 #[doc = "0x38 - stack min value"]
111 #[inline(always)]
112 pub const fn core_0_sp_min(&self) -> &CORE_0_SP_MIN {
113 &self.core_0_sp_min
114 }
115 #[doc = "0x3c - stack max value"]
116 #[inline(always)]
117 pub const fn core_0_sp_max(&self) -> &CORE_0_SP_MAX {
118 &self.core_0_sp_max
119 }
120 #[doc = "0x40 - stack monitor pc status register"]
121 #[inline(always)]
122 pub const fn core_0_sp_pc(&self) -> &CORE_0_SP_PC {
123 &self.core_0_sp_pc
124 }
125 #[doc = "0x44 - record enable configuration register"]
126 #[inline(always)]
127 pub const fn core_0_rcd_en(&self) -> &CORE_0_RCD_EN {
128 &self.core_0_rcd_en
129 }
130 #[doc = "0x48 - record status regsiter"]
131 #[inline(always)]
132 pub const fn core_0_rcd_pdebugpc(&self) -> &CORE_0_RCD_PDEBUGPC {
133 &self.core_0_rcd_pdebugpc
134 }
135 #[doc = "0x4c - record status regsiter"]
136 #[inline(always)]
137 pub const fn core_0_rcd_pdebugsp(&self) -> &CORE_0_RCD_PDEBUGSP {
138 &self.core_0_rcd_pdebugsp
139 }
140 #[doc = "0x50 - exception monitor status register0"]
141 #[inline(always)]
142 pub const fn core_0_iram0_exception_monitor_0(&self) -> &CORE_0_IRAM0_EXCEPTION_MONITOR_0 {
143 &self.core_0_iram0_exception_monitor_0
144 }
145 #[doc = "0x54 - exception monitor status register1"]
146 #[inline(always)]
147 pub const fn core_0_iram0_exception_monitor_1(&self) -> &CORE_0_IRAM0_EXCEPTION_MONITOR_1 {
148 &self.core_0_iram0_exception_monitor_1
149 }
150 #[doc = "0x58 - exception monitor status register2"]
151 #[inline(always)]
152 pub const fn core_0_dram0_exception_monitor_0(&self) -> &CORE_0_DRAM0_EXCEPTION_MONITOR_0 {
153 &self.core_0_dram0_exception_monitor_0
154 }
155 #[doc = "0x5c - exception monitor status register3"]
156 #[inline(always)]
157 pub const fn core_0_dram0_exception_monitor_1(&self) -> &CORE_0_DRAM0_EXCEPTION_MONITOR_1 {
158 &self.core_0_dram0_exception_monitor_1
159 }
160 #[doc = "0x60 - exception monitor status register4"]
161 #[inline(always)]
162 pub const fn core_0_dram0_exception_monitor_2(&self) -> &CORE_0_DRAM0_EXCEPTION_MONITOR_2 {
163 &self.core_0_dram0_exception_monitor_2
164 }
165 #[doc = "0x64 - exception monitor status register5"]
166 #[inline(always)]
167 pub const fn core_0_dram0_exception_monitor_3(&self) -> &CORE_0_DRAM0_EXCEPTION_MONITOR_3 {
168 &self.core_0_dram0_exception_monitor_3
169 }
170 #[doc = "0x68 - exception monitor status register6"]
171 #[inline(always)]
172 pub const fn core_x_iram0_dram0_exception_monitor_0(
173 &self,
174 ) -> &CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_0 {
175 &self.core_x_iram0_dram0_exception_monitor_0
176 }
177 #[doc = "0x6c - exception monitor status register7"]
178 #[inline(always)]
179 pub const fn core_x_iram0_dram0_exception_monitor_1(
180 &self,
181 ) -> &CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_1 {
182 &self.core_x_iram0_dram0_exception_monitor_1
183 }
184 #[doc = "0x70 - ASSIST_DEBUG_CORE_0_LASTPC_BEFORE_EXCEPTION"]
185 #[inline(always)]
186 pub const fn core_0_lastpc_before_exception(&self) -> &CORE_0_LASTPC_BEFORE_EXCEPTION {
187 &self.core_0_lastpc_before_exception
188 }
189 #[doc = "0x74 - ASSIST_DEBUG_CORE_0_DEBUG_MODE"]
190 #[inline(always)]
191 pub const fn core_0_debug_mode(&self) -> &CORE_0_DEBUG_MODE {
192 &self.core_0_debug_mode
193 }
194 #[doc = "0x78 - clock register"]
195 #[inline(always)]
196 pub const fn clock_gate(&self) -> &CLOCK_GATE {
197 &self.clock_gate
198 }
199 #[doc = "0x3fc - version register"]
200 #[inline(always)]
201 pub const fn date(&self) -> &DATE {
202 &self.date
203 }
204}
205#[doc = "CORE_0_MONTR_ENA (rw) register accessor: ASSIST_DEBUG_CORE_0_MONTR_ENA_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_montr_ena::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_montr_ena::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_montr_ena`] module"]
206pub type CORE_0_MONTR_ENA = crate::Reg<core_0_montr_ena::CORE_0_MONTR_ENA_SPEC>;
207#[doc = "ASSIST_DEBUG_CORE_0_MONTR_ENA_REG"]
208pub mod core_0_montr_ena;
209#[doc = "CORE_0_INTR_RAW (r) register accessor: core0 monitor interrupt status register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_intr_raw::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_intr_raw`] module"]
210pub type CORE_0_INTR_RAW = crate::Reg<core_0_intr_raw::CORE_0_INTR_RAW_SPEC>;
211#[doc = "core0 monitor interrupt status register"]
212pub mod core_0_intr_raw;
213#[doc = "CORE_0_INTR_ENA (rw) register accessor: core0 monitor interrupt enable register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_intr_ena::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_intr_ena::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_intr_ena`] module"]
214pub type CORE_0_INTR_ENA = crate::Reg<core_0_intr_ena::CORE_0_INTR_ENA_SPEC>;
215#[doc = "core0 monitor interrupt enable register"]
216pub mod core_0_intr_ena;
217#[doc = "CORE_0_INTR_CLR (w) register accessor: core0 monitor interrupt clr register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_intr_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_intr_clr`] module"]
218pub type CORE_0_INTR_CLR = crate::Reg<core_0_intr_clr::CORE_0_INTR_CLR_SPEC>;
219#[doc = "core0 monitor interrupt clr register"]
220pub mod core_0_intr_clr;
221#[doc = "CORE_0_AREA_DRAM0_0_MIN (rw) register accessor: core0 dram0 region0 addr configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_area_dram0_0_min::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_area_dram0_0_min::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_area_dram0_0_min`] module"]
222pub type CORE_0_AREA_DRAM0_0_MIN =
223 crate::Reg<core_0_area_dram0_0_min::CORE_0_AREA_DRAM0_0_MIN_SPEC>;
224#[doc = "core0 dram0 region0 addr configuration register"]
225pub mod core_0_area_dram0_0_min;
226#[doc = "CORE_0_AREA_DRAM0_0_MAX (rw) register accessor: core0 dram0 region0 addr configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_area_dram0_0_max::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_area_dram0_0_max::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_area_dram0_0_max`] module"]
227pub type CORE_0_AREA_DRAM0_0_MAX =
228 crate::Reg<core_0_area_dram0_0_max::CORE_0_AREA_DRAM0_0_MAX_SPEC>;
229#[doc = "core0 dram0 region0 addr configuration register"]
230pub mod core_0_area_dram0_0_max;
231#[doc = "CORE_0_AREA_DRAM0_1_MIN (rw) register accessor: core0 dram0 region1 addr configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_area_dram0_1_min::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_area_dram0_1_min::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_area_dram0_1_min`] module"]
232pub type CORE_0_AREA_DRAM0_1_MIN =
233 crate::Reg<core_0_area_dram0_1_min::CORE_0_AREA_DRAM0_1_MIN_SPEC>;
234#[doc = "core0 dram0 region1 addr configuration register"]
235pub mod core_0_area_dram0_1_min;
236#[doc = "CORE_0_AREA_DRAM0_1_MAX (rw) register accessor: core0 dram0 region1 addr configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_area_dram0_1_max::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_area_dram0_1_max::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_area_dram0_1_max`] module"]
237pub type CORE_0_AREA_DRAM0_1_MAX =
238 crate::Reg<core_0_area_dram0_1_max::CORE_0_AREA_DRAM0_1_MAX_SPEC>;
239#[doc = "core0 dram0 region1 addr configuration register"]
240pub mod core_0_area_dram0_1_max;
241#[doc = "CORE_0_AREA_PIF_0_MIN (rw) register accessor: core0 PIF region0 addr configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_area_pif_0_min::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_area_pif_0_min::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_area_pif_0_min`] module"]
242pub type CORE_0_AREA_PIF_0_MIN = crate::Reg<core_0_area_pif_0_min::CORE_0_AREA_PIF_0_MIN_SPEC>;
243#[doc = "core0 PIF region0 addr configuration register"]
244pub mod core_0_area_pif_0_min;
245#[doc = "CORE_0_AREA_PIF_0_MAX (rw) register accessor: core0 PIF region0 addr configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_area_pif_0_max::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_area_pif_0_max::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_area_pif_0_max`] module"]
246pub type CORE_0_AREA_PIF_0_MAX = crate::Reg<core_0_area_pif_0_max::CORE_0_AREA_PIF_0_MAX_SPEC>;
247#[doc = "core0 PIF region0 addr configuration register"]
248pub mod core_0_area_pif_0_max;
249#[doc = "CORE_0_AREA_PIF_1_MIN (rw) register accessor: core0 PIF region1 addr configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_area_pif_1_min::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_area_pif_1_min::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_area_pif_1_min`] module"]
250pub type CORE_0_AREA_PIF_1_MIN = crate::Reg<core_0_area_pif_1_min::CORE_0_AREA_PIF_1_MIN_SPEC>;
251#[doc = "core0 PIF region1 addr configuration register"]
252pub mod core_0_area_pif_1_min;
253#[doc = "CORE_0_AREA_PIF_1_MAX (rw) register accessor: core0 PIF region1 addr configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_area_pif_1_max::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_area_pif_1_max::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_area_pif_1_max`] module"]
254pub type CORE_0_AREA_PIF_1_MAX = crate::Reg<core_0_area_pif_1_max::CORE_0_AREA_PIF_1_MAX_SPEC>;
255#[doc = "core0 PIF region1 addr configuration register"]
256pub mod core_0_area_pif_1_max;
257#[doc = "CORE_0_AREA_PC (r) register accessor: core0 area pc status register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_area_pc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_area_pc`] module"]
258pub type CORE_0_AREA_PC = crate::Reg<core_0_area_pc::CORE_0_AREA_PC_SPEC>;
259#[doc = "core0 area pc status register"]
260pub mod core_0_area_pc;
261#[doc = "CORE_0_AREA_SP (r) register accessor: core0 area sp status register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_area_sp::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_area_sp`] module"]
262pub type CORE_0_AREA_SP = crate::Reg<core_0_area_sp::CORE_0_AREA_SP_SPEC>;
263#[doc = "core0 area sp status register"]
264pub mod core_0_area_sp;
265#[doc = "CORE_0_SP_MIN (rw) register accessor: stack min value\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_sp_min::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_sp_min::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_sp_min`] module"]
266pub type CORE_0_SP_MIN = crate::Reg<core_0_sp_min::CORE_0_SP_MIN_SPEC>;
267#[doc = "stack min value"]
268pub mod core_0_sp_min;
269#[doc = "CORE_0_SP_MAX (rw) register accessor: stack max value\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_sp_max::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_sp_max::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_sp_max`] module"]
270pub type CORE_0_SP_MAX = crate::Reg<core_0_sp_max::CORE_0_SP_MAX_SPEC>;
271#[doc = "stack max value"]
272pub mod core_0_sp_max;
273#[doc = "CORE_0_SP_PC (r) register accessor: stack monitor pc status register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_sp_pc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_sp_pc`] module"]
274pub type CORE_0_SP_PC = crate::Reg<core_0_sp_pc::CORE_0_SP_PC_SPEC>;
275#[doc = "stack monitor pc status register"]
276pub mod core_0_sp_pc;
277#[doc = "CORE_0_RCD_EN (rw) register accessor: record enable configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_rcd_en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_rcd_en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_rcd_en`] module"]
278pub type CORE_0_RCD_EN = crate::Reg<core_0_rcd_en::CORE_0_RCD_EN_SPEC>;
279#[doc = "record enable configuration register"]
280pub mod core_0_rcd_en;
281#[doc = "CORE_0_RCD_PDEBUGPC (r) register accessor: record status regsiter\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_rcd_pdebugpc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_rcd_pdebugpc`] module"]
282pub type CORE_0_RCD_PDEBUGPC = crate::Reg<core_0_rcd_pdebugpc::CORE_0_RCD_PDEBUGPC_SPEC>;
283#[doc = "record status regsiter"]
284pub mod core_0_rcd_pdebugpc;
285#[doc = "CORE_0_RCD_PDEBUGSP (r) register accessor: record status regsiter\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_rcd_pdebugsp::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_rcd_pdebugsp`] module"]
286pub type CORE_0_RCD_PDEBUGSP = crate::Reg<core_0_rcd_pdebugsp::CORE_0_RCD_PDEBUGSP_SPEC>;
287#[doc = "record status regsiter"]
288pub mod core_0_rcd_pdebugsp;
289#[doc = "CORE_0_IRAM0_EXCEPTION_MONITOR_0 (r) register accessor: exception monitor status register0\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_iram0_exception_monitor_0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_iram0_exception_monitor_0`] module"]
290pub type CORE_0_IRAM0_EXCEPTION_MONITOR_0 =
291 crate::Reg<core_0_iram0_exception_monitor_0::CORE_0_IRAM0_EXCEPTION_MONITOR_0_SPEC>;
292#[doc = "exception monitor status register0"]
293pub mod core_0_iram0_exception_monitor_0;
294#[doc = "CORE_0_IRAM0_EXCEPTION_MONITOR_1 (r) register accessor: exception monitor status register1\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_iram0_exception_monitor_1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_iram0_exception_monitor_1`] module"]
295pub type CORE_0_IRAM0_EXCEPTION_MONITOR_1 =
296 crate::Reg<core_0_iram0_exception_monitor_1::CORE_0_IRAM0_EXCEPTION_MONITOR_1_SPEC>;
297#[doc = "exception monitor status register1"]
298pub mod core_0_iram0_exception_monitor_1;
299#[doc = "CORE_0_DRAM0_EXCEPTION_MONITOR_0 (r) register accessor: exception monitor status register2\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_dram0_exception_monitor_0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_dram0_exception_monitor_0`] module"]
300pub type CORE_0_DRAM0_EXCEPTION_MONITOR_0 =
301 crate::Reg<core_0_dram0_exception_monitor_0::CORE_0_DRAM0_EXCEPTION_MONITOR_0_SPEC>;
302#[doc = "exception monitor status register2"]
303pub mod core_0_dram0_exception_monitor_0;
304#[doc = "CORE_0_DRAM0_EXCEPTION_MONITOR_1 (r) register accessor: exception monitor status register3\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_dram0_exception_monitor_1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_dram0_exception_monitor_1`] module"]
305pub type CORE_0_DRAM0_EXCEPTION_MONITOR_1 =
306 crate::Reg<core_0_dram0_exception_monitor_1::CORE_0_DRAM0_EXCEPTION_MONITOR_1_SPEC>;
307#[doc = "exception monitor status register3"]
308pub mod core_0_dram0_exception_monitor_1;
309#[doc = "CORE_0_DRAM0_EXCEPTION_MONITOR_2 (r) register accessor: exception monitor status register4\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_dram0_exception_monitor_2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_dram0_exception_monitor_2`] module"]
310pub type CORE_0_DRAM0_EXCEPTION_MONITOR_2 =
311 crate::Reg<core_0_dram0_exception_monitor_2::CORE_0_DRAM0_EXCEPTION_MONITOR_2_SPEC>;
312#[doc = "exception monitor status register4"]
313pub mod core_0_dram0_exception_monitor_2;
314#[doc = "CORE_0_DRAM0_EXCEPTION_MONITOR_3 (r) register accessor: exception monitor status register5\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_dram0_exception_monitor_3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_dram0_exception_monitor_3`] module"]
315pub type CORE_0_DRAM0_EXCEPTION_MONITOR_3 =
316 crate::Reg<core_0_dram0_exception_monitor_3::CORE_0_DRAM0_EXCEPTION_MONITOR_3_SPEC>;
317#[doc = "exception monitor status register5"]
318pub mod core_0_dram0_exception_monitor_3;
319#[doc = "CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_0 (rw) register accessor: exception monitor status register6\n\nYou can [`read`](crate::Reg::read) this register and get [`core_x_iram0_dram0_exception_monitor_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_x_iram0_dram0_exception_monitor_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_x_iram0_dram0_exception_monitor_0`] module"]
320pub type CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_0 =
321 crate::Reg<core_x_iram0_dram0_exception_monitor_0::CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_0_SPEC>;
322#[doc = "exception monitor status register6"]
323pub mod core_x_iram0_dram0_exception_monitor_0;
324#[doc = "CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_1 (rw) register accessor: exception monitor status register7\n\nYou can [`read`](crate::Reg::read) this register and get [`core_x_iram0_dram0_exception_monitor_1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_x_iram0_dram0_exception_monitor_1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_x_iram0_dram0_exception_monitor_1`] module"]
325pub type CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_1 =
326 crate::Reg<core_x_iram0_dram0_exception_monitor_1::CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_1_SPEC>;
327#[doc = "exception monitor status register7"]
328pub mod core_x_iram0_dram0_exception_monitor_1;
329#[doc = "CORE_0_LASTPC_BEFORE_EXCEPTION (r) register accessor: ASSIST_DEBUG_CORE_0_LASTPC_BEFORE_EXCEPTION\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_lastpc_before_exception::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_lastpc_before_exception`] module"]
330pub type CORE_0_LASTPC_BEFORE_EXCEPTION =
331 crate::Reg<core_0_lastpc_before_exception::CORE_0_LASTPC_BEFORE_EXCEPTION_SPEC>;
332#[doc = "ASSIST_DEBUG_CORE_0_LASTPC_BEFORE_EXCEPTION"]
333pub mod core_0_lastpc_before_exception;
334#[doc = "CORE_0_DEBUG_MODE (r) register accessor: ASSIST_DEBUG_CORE_0_DEBUG_MODE\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_debug_mode::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_debug_mode`] module"]
335pub type CORE_0_DEBUG_MODE = crate::Reg<core_0_debug_mode::CORE_0_DEBUG_MODE_SPEC>;
336#[doc = "ASSIST_DEBUG_CORE_0_DEBUG_MODE"]
337pub mod core_0_debug_mode;
338#[doc = "CLOCK_GATE (rw) register accessor: clock register\n\nYou can [`read`](crate::Reg::read) this register and get [`clock_gate::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clock_gate::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clock_gate`] module"]
339pub type CLOCK_GATE = crate::Reg<clock_gate::CLOCK_GATE_SPEC>;
340#[doc = "clock register"]
341pub mod clock_gate;
342#[doc = "DATE (rw) register accessor: version register\n\nYou can [`read`](crate::Reg::read) this register and get [`date::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`date::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@date`] module"]
343pub type DATE = crate::Reg<date::DATE_SPEC>;
344#[doc = "version register"]
345pub mod date;