pub struct GPIO_SD { /* private fields */ }
Expand description
Sigma-Delta Modulation
Implementations§
Source§impl GPIO_SD
impl GPIO_SD
Sourcepub const PTR: *const RegisterBlock = {0x60091f00 as *const gpio_sd::RegisterBlock}
pub const PTR: *const RegisterBlock = {0x60091f00 as *const gpio_sd::RegisterBlock}
Pointer to the register block
Sourcepub const fn ptr() -> *const RegisterBlock
pub const fn ptr() -> *const RegisterBlock
Return the pointer to the register block
Sourcepub unsafe fn steal() -> Self
pub unsafe fn steal() -> Self
Steal an instance of this peripheral
§Safety
Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.
Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.
Methods from Deref<Target = RegisterBlock>§
Sourcepub fn sigmadelta(&self, n: usize) -> &SIGMADELTA
pub fn sigmadelta(&self, n: usize) -> &SIGMADELTA
0x00..0x10 - Duty Cycle Configure Register of SDM%s
Sourcepub fn sigmadelta_iter(&self) -> impl Iterator<Item = &SIGMADELTA>
pub fn sigmadelta_iter(&self) -> impl Iterator<Item = &SIGMADELTA>
Iterator for array of: 0x00..0x10 - Duty Cycle Configure Register of SDM%s
Sourcepub fn clock_gate(&self) -> &CLOCK_GATE
pub fn clock_gate(&self) -> &CLOCK_GATE
0x20 - Clock Gating Configure Register
Sourcepub fn sigmadelta_misc(&self) -> &SIGMADELTA_MISC
pub fn sigmadelta_misc(&self) -> &SIGMADELTA_MISC
0x24 - MISC Register
Sourcepub fn pad_comp_config(&self) -> &PAD_COMP_CONFIG
pub fn pad_comp_config(&self) -> &PAD_COMP_CONFIG
0x28 - PAD Compare configure Register
Sourcepub fn pad_comp_filter(&self) -> &PAD_COMP_FILTER
pub fn pad_comp_filter(&self) -> &PAD_COMP_FILTER
0x2c - Zero Detect filter Register
Sourcepub fn glitch_filter_ch(&self, n: usize) -> &GLITCH_FILTER_CH
pub fn glitch_filter_ch(&self, n: usize) -> &GLITCH_FILTER_CH
0x30..0x50 - Glitch Filter Configure Register of Channel%s
Sourcepub fn glitch_filter_ch_iter(&self) -> impl Iterator<Item = &GLITCH_FILTER_CH>
pub fn glitch_filter_ch_iter(&self) -> impl Iterator<Item = &GLITCH_FILTER_CH>
Iterator for array of: 0x30..0x50 - Glitch Filter Configure Register of Channel%s
Sourcepub fn etm_event_ch_cfg(&self, n: usize) -> &ETM_EVENT_CH_CFG
pub fn etm_event_ch_cfg(&self, n: usize) -> &ETM_EVENT_CH_CFG
0x60..0x80 - Etm Config register of Channel%s
Sourcepub fn etm_event_ch_cfg_iter(&self) -> impl Iterator<Item = &ETM_EVENT_CH_CFG>
pub fn etm_event_ch_cfg_iter(&self) -> impl Iterator<Item = &ETM_EVENT_CH_CFG>
Iterator for array of: 0x60..0x80 - Etm Config register of Channel%s
Sourcepub fn etm_event_ch0_cfg(&self) -> &ETM_EVENT_CH_CFG
pub fn etm_event_ch0_cfg(&self) -> &ETM_EVENT_CH_CFG
0x60 - Etm Config register of Channel0
Sourcepub fn etm_event_ch1_cfg(&self) -> &ETM_EVENT_CH_CFG
pub fn etm_event_ch1_cfg(&self) -> &ETM_EVENT_CH_CFG
0x64 - Etm Config register of Channel1
Sourcepub fn etm_event_ch2_cfg(&self) -> &ETM_EVENT_CH_CFG
pub fn etm_event_ch2_cfg(&self) -> &ETM_EVENT_CH_CFG
0x68 - Etm Config register of Channel2
Sourcepub fn etm_event_ch3_cfg(&self) -> &ETM_EVENT_CH_CFG
pub fn etm_event_ch3_cfg(&self) -> &ETM_EVENT_CH_CFG
0x6c - Etm Config register of Channel3
Sourcepub fn etm_event_ch4_cfg(&self) -> &ETM_EVENT_CH_CFG
pub fn etm_event_ch4_cfg(&self) -> &ETM_EVENT_CH_CFG
0x70 - Etm Config register of Channel4
Sourcepub fn etm_event_ch5_cfg(&self) -> &ETM_EVENT_CH_CFG
pub fn etm_event_ch5_cfg(&self) -> &ETM_EVENT_CH_CFG
0x74 - Etm Config register of Channel5
Sourcepub fn etm_event_ch6_cfg(&self) -> &ETM_EVENT_CH_CFG
pub fn etm_event_ch6_cfg(&self) -> &ETM_EVENT_CH_CFG
0x78 - Etm Config register of Channel6
Sourcepub fn etm_event_ch7_cfg(&self) -> &ETM_EVENT_CH_CFG
pub fn etm_event_ch7_cfg(&self) -> &ETM_EVENT_CH_CFG
0x7c - Etm Config register of Channel7
Sourcepub fn etm_task_p0_cfg(&self) -> &ETM_TASK_P0_CFG
pub fn etm_task_p0_cfg(&self) -> &ETM_TASK_P0_CFG
0xa0 - Etm Configure Register to decide which GPIO been chosen
Sourcepub fn etm_task_p1_cfg(&self) -> &ETM_TASK_P1_CFG
pub fn etm_task_p1_cfg(&self) -> &ETM_TASK_P1_CFG
0xa4 - Etm Configure Register to decide which GPIO been chosen
Sourcepub fn etm_task_p2_cfg(&self) -> &ETM_TASK_P2_CFG
pub fn etm_task_p2_cfg(&self) -> &ETM_TASK_P2_CFG
0xa8 - Etm Configure Register to decide which GPIO been chosen
Sourcepub fn etm_task_p3_cfg(&self) -> &ETM_TASK_P3_CFG
pub fn etm_task_p3_cfg(&self) -> &ETM_TASK_P3_CFG
0xac - Etm Configure Register to decide which GPIO been chosen
Sourcepub fn etm_task_p4_cfg(&self) -> &ETM_TASK_P4_CFG
pub fn etm_task_p4_cfg(&self) -> &ETM_TASK_P4_CFG
0xb0 - Etm Configure Register to decide which GPIO been chosen
Sourcepub fn etm_task_p5_cfg(&self) -> &ETM_TASK_P5_CFG
pub fn etm_task_p5_cfg(&self) -> &ETM_TASK_P5_CFG
0xb4 - Etm Configure Register to decide which GPIO been chosen
Sourcepub fn etm_task_p6_cfg(&self) -> &ETM_TASK_P6_CFG
pub fn etm_task_p6_cfg(&self) -> &ETM_TASK_P6_CFG
0xb8 - Etm Configure Register to decide which GPIO been chosen