esp32h2::spi1

Struct RegisterBlock

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#[repr(C)]
pub struct RegisterBlock { /* private fields */ }
Expand description

Register block

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impl RegisterBlock

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pub const fn cmd(&self) -> &CMD

0x00 - SPI1 memory command register

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pub const fn addr(&self) -> &ADDR

0x04 - SPI1 address register

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pub const fn ctrl(&self) -> &CTRL

0x08 - SPI1 control register.

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pub const fn ctrl1(&self) -> &CTRL1

0x0c - SPI1 control1 register.

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pub const fn ctrl2(&self) -> &CTRL2

0x10 - SPI1 control2 register.

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pub const fn clock(&self) -> &CLOCK

0x14 - SPI1 clock division control register.

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pub const fn user(&self) -> &USER

0x18 - SPI1 user register.

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pub const fn user1(&self) -> &USER1

0x1c - SPI1 user1 register.

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pub const fn user2(&self) -> &USER2

0x20 - SPI1 user2 register.

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pub const fn mosi_dlen(&self) -> &MOSI_DLEN

0x24 - SPI1 send data bit length control register.

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pub const fn miso_dlen(&self) -> &MISO_DLEN

0x28 - SPI1 receive data bit length control register.

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pub const fn rd_status(&self) -> &RD_STATUS

0x2c - SPI1 status register.

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pub const fn misc(&self) -> &MISC

0x34 - SPI1 misc register

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pub const fn tx_crc(&self) -> &TX_CRC

0x38 - SPI1 TX CRC data register.

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pub const fn cache_fctrl(&self) -> &CACHE_FCTRL

0x3c - SPI1 bit mode control register.

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pub const fn w(&self, n: usize) -> &W

0x58..0x98 - SPI1 memory data buffer%s

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pub fn w_iter(&self) -> impl Iterator<Item = &W>

Iterator for array of: 0x58..0x98 - SPI1 memory data buffer%s

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pub const fn flash_waiti_ctrl(&self) -> &FLASH_WAITI_CTRL

0x98 - SPI1 wait idle control register

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pub const fn flash_sus_ctrl(&self) -> &FLASH_SUS_CTRL

0x9c - SPI1 flash suspend control register

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pub const fn flash_sus_cmd(&self) -> &FLASH_SUS_CMD

0xa0 - SPI1 flash suspend command register

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pub const fn sus_status(&self) -> &SUS_STATUS

0xa4 - SPI1 flash suspend status register

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pub const fn int_ena(&self) -> &INT_ENA

0xc0 - SPI1 interrupt enable register

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pub const fn int_clr(&self) -> &INT_CLR

0xc4 - SPI1 interrupt clear register

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pub const fn int_raw(&self) -> &INT_RAW

0xc8 - SPI1 interrupt raw register

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pub const fn int_st(&self) -> &INT_ST

0xcc - SPI1 interrupt status register

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pub const fn ddr(&self) -> &DDR

0xd4 - SPI1 DDR control register

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pub const fn timing_cali(&self) -> &TIMING_CALI

0x180 - SPI1 timing control register

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pub const fn clock_gate(&self) -> &CLOCK_GATE

0x200 - SPI1 clk_gate register

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pub const fn date(&self) -> &DATE

0x3fc - Version control register

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