esp32h2/ieee802154/
sec_ctrl.rs

1#[doc = "Register `SEC_CTRL` reader"]
2pub type R = crate::R<SEC_CTRL_SPEC>;
3#[doc = "Register `SEC_CTRL` writer"]
4pub type W = crate::W<SEC_CTRL_SPEC>;
5#[doc = "Field `SEC_EN` reader - "]
6pub type SEC_EN_R = crate::BitReader;
7#[doc = "Field `SEC_EN` writer - "]
8pub type SEC_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `SEC_PAYLOAD_OFFSET` reader - "]
10pub type SEC_PAYLOAD_OFFSET_R = crate::FieldReader;
11#[doc = "Field `SEC_PAYLOAD_OFFSET` writer - "]
12pub type SEC_PAYLOAD_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 7>;
13impl R {
14    #[doc = "Bit 0"]
15    #[inline(always)]
16    pub fn sec_en(&self) -> SEC_EN_R {
17        SEC_EN_R::new((self.bits & 1) != 0)
18    }
19    #[doc = "Bits 8:14"]
20    #[inline(always)]
21    pub fn sec_payload_offset(&self) -> SEC_PAYLOAD_OFFSET_R {
22        SEC_PAYLOAD_OFFSET_R::new(((self.bits >> 8) & 0x7f) as u8)
23    }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28        f.debug_struct("SEC_CTRL")
29            .field("sec_en", &self.sec_en())
30            .field("sec_payload_offset", &self.sec_payload_offset())
31            .finish()
32    }
33}
34impl W {
35    #[doc = "Bit 0"]
36    #[inline(always)]
37    pub fn sec_en(&mut self) -> SEC_EN_W<SEC_CTRL_SPEC> {
38        SEC_EN_W::new(self, 0)
39    }
40    #[doc = "Bits 8:14"]
41    #[inline(always)]
42    pub fn sec_payload_offset(&mut self) -> SEC_PAYLOAD_OFFSET_W<SEC_CTRL_SPEC> {
43        SEC_PAYLOAD_OFFSET_W::new(self, 8)
44    }
45}
46#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`sec_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sec_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
47pub struct SEC_CTRL_SPEC;
48impl crate::RegisterSpec for SEC_CTRL_SPEC {
49    type Ux = u32;
50}
51#[doc = "`read()` method returns [`sec_ctrl::R`](R) reader structure"]
52impl crate::Readable for SEC_CTRL_SPEC {}
53#[doc = "`write(|w| ..)` method takes [`sec_ctrl::W`](W) writer structure"]
54impl crate::Writable for SEC_CTRL_SPEC {
55    type Safety = crate::Unsafe;
56    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
57    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
58}
59#[doc = "`reset()` method sets SEC_CTRL to value 0"]
60impl crate::Resettable for SEC_CTRL_SPEC {
61    const RESET_VALUE: u32 = 0;
62}
esp32h2/ieee802154/sec_ctrl.rs

esp32h2/ieee802154/
sec_ctrl.rs
